pounder_test/src/bin/lockin-external.rs

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Rust
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#![deny(warnings)]
#![no_std]
#![no_main]
use generic_array::typenum::U4;
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use miniconf::{
embedded_nal::{IpAddr, Ipv4Addr},
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minimq, Miniconf, MqttInterface,
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};
use serde::Deserialize;
use dsp::{Accu, Complex, ComplexExt, Lockin, RPLL};
use stabilizer::hardware::{
design_parameters, setup, Adc0Input, Adc1Input, AfeGain, CycleCounter,
Dac0Output, Dac1Output, InputStamper, NetworkStack, AFE0, AFE1,
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};
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#[derive(Copy, Clone, Debug, Deserialize, Miniconf)]
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enum Conf {
PowerPhase,
FrequencyDiscriminator,
Quadrature,
}
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#[derive(Copy, Clone, Debug, Deserialize, Miniconf)]
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pub struct Settings {
afe: [AfeGain; 2],
pll_tc: [u8; 2],
lockin_tc: u8,
lockin_harmonic: i32,
lockin_phase: i32,
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output_conf: [Conf; 2],
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}
impl Default for Settings {
fn default() -> Self {
Self {
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afe: [AfeGain::G1; 2],
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pll_tc: [21, 21], // frequency and phase settling time (log2 counter cycles)
lockin_tc: 6, // lockin lowpass time constant
lockin_harmonic: -1, // Harmonic index of the LO: -1 to _de_modulate the fundamental (complex conjugate)
lockin_phase: 0, // Demodulation LO phase offset
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output_conf: [Conf::Quadrature; 2],
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}
}
}
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#[rtic::app(device = stm32h7xx_hal::stm32, peripherals = true, monotonic = rtic::cyccnt::CYCCNT)]
const APP: () = {
struct Resources {
afes: (AFE0, AFE1),
adcs: (Adc0Input, Adc1Input),
dacs: (Dac0Output, Dac1Output),
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clock: CycleCounter,
mqtt_interface:
MqttInterface<Settings, NetworkStack, minimq::consts::U256>,
settings: Settings,
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timestamper: InputStamper,
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pll: RPLL,
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lockin: Lockin<U4>,
}
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#[init(spawn=[settings_update])]
fn init(c: init::Context) -> init::LateResources {
// Configure the microcontroller
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let (mut stabilizer, _pounder) = setup(c.core, c.device);
let mqtt_interface = {
let mqtt_client = {
let broker = IpAddr::V4(Ipv4Addr::new(10, 34, 16, 10));
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minimq::MqttClient::new(broker, "", stabilizer.net.stack)
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.unwrap()
};
MqttInterface::new(mqtt_client, "lockin", Settings::default())
.unwrap()
};
let settings = Settings::default();
let pll = RPLL::new(
design_parameters::ADC_SAMPLE_TICKS_LOG2
+ design_parameters::SAMPLE_BUFFER_SIZE_LOG2,
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);
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// Spawn a settings update for default settings.
c.spawn.settings_update().unwrap();
// Enable ADC/DAC events
stabilizer.adcs.0.start();
stabilizer.adcs.1.start();
stabilizer.dacs.0.start();
stabilizer.dacs.1.start();
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// Start recording digital input timestamps.
stabilizer.timestamp_timer.start();
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// Start sampling ADCs.
stabilizer.adc_dac_timer.start();
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// Enable the timestamper.
stabilizer.timestamper.start();
init::LateResources {
afes: stabilizer.afes,
adcs: stabilizer.adcs,
dacs: stabilizer.dacs,
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timestamper: stabilizer.timestamper,
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clock: stabilizer.cycle_counter,
mqtt_interface,
settings,
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pll,
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lockin: Lockin::default(),
}
}
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/// Main DSP processing routine.
///
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/// See `dual-iir` for general notes on processing time and timing.
///
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/// This is an implementation of a externally (DI0) referenced PLL lockin on the ADC0 signal.
/// It outputs either I/Q or power/phase on DAC0/DAC1. Data is normalized to full scale.
/// PLL bandwidth, filter bandwidth, slope, and x/y or power/phase post-filters are available.
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#[task(binds=DMA1_STR4, resources=[adcs, dacs, lockin, timestamper, pll, settings], priority=2)]
fn process(c: process::Context) {
let adc_samples = [
c.resources.adcs.0.acquire_buffer(),
c.resources.adcs.1.acquire_buffer(),
];
let dac_samples = [
c.resources.dacs.0.acquire_buffer(),
c.resources.dacs.1.acquire_buffer(),
];
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let lockin = c.resources.lockin;
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let settings = c.resources.settings;
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let timestamp =
c.resources.timestamper.latest_timestamp().unwrap_or(None); // Ignore data from timer capture overflows.
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let (pll_phase, pll_frequency) = c.resources.pll.update(
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timestamp.map(|t| t as i32),
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settings.pll_tc[0],
settings.pll_tc[1],
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);
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let sample_frequency = ((pll_frequency
>> design_parameters::SAMPLE_BUFFER_SIZE_LOG2)
as i32)
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.wrapping_mul(settings.lockin_harmonic);
let sample_phase = settings
.lockin_phase
.wrapping_add(pll_phase.wrapping_mul(settings.lockin_harmonic));
let output: Complex<i32> = adc_samples[0]
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.iter()
// Zip in the LO phase.
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.zip(Accu::new(sample_phase, sample_frequency))
// Convert to signed, MSB align the ADC sample, update the Lockin (demodulate, filter)
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.map(|(&sample, phase)| {
let s = (sample as i16 as i32) << 16;
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lockin.update(s, phase, settings.lockin_tc)
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})
// Decimate
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.last()
.unwrap()
* 2; // Full scale assuming the 2f component is gone.
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let output = [
match settings.output_conf[0] {
Conf::PowerPhase => output.abs_sqr() as _,
Conf::FrequencyDiscriminator => (output.log2() << 24) as _,
Conf::Quadrature => output.re,
},
match settings.output_conf[1] {
Conf::PowerPhase => output.arg(),
Conf::FrequencyDiscriminator => pll_frequency as _,
Conf::Quadrature => output.im,
},
];
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// Convert to DAC data.
for i in 0..dac_samples[0].len() {
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dac_samples[0][i] = (output[0] >> 16) as u16 ^ 0x8000;
dac_samples[1][i] = (output[1] >> 16) as u16 ^ 0x8000;
}
}
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#[idle(resources=[mqtt_interface, clock], spawn=[settings_update])]
fn idle(mut c: idle::Context) -> ! {
let clock = c.resources.clock;
loop {
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let sleep = c.resources.mqtt_interface.lock(|interface| {
!interface.network_stack().poll(clock.current_ms())
});
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if c.resources
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.mqtt_interface
.lock(|interface| interface.update().unwrap())
{
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c.spawn.settings_update().unwrap()
} else if sleep {
cortex_m::asm::wfi();
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}
}
}
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#[task(priority = 1, resources=[mqtt_interface, settings, afes])]
fn settings_update(mut c: settings_update::Context) {
let settings = &c.resources.mqtt_interface.settings;
c.resources.afes.0.set_gain(settings.afe[0]);
c.resources.afes.1.set_gain(settings.afe[1]);
c.resources.settings.lock(|current| *current = *settings);
}
#[task(binds = ETH, priority = 1)]
fn eth(_: eth::Context) {
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unsafe { stm32h7xx_hal::ethernet::interrupt_handler() }
}
#[task(binds = SPI2, priority = 3)]
fn spi2(_: spi2::Context) {
panic!("ADC0 input overrun");
}
#[task(binds = SPI3, priority = 3)]
fn spi3(_: spi3::Context) {
panic!("ADC1 input overrun");
}
#[task(binds = SPI4, priority = 3)]
fn spi4(_: spi4::Context) {
panic!("DAC0 output error");
}
#[task(binds = SPI5, priority = 3)]
fn spi5(_: spi5::Context) {
panic!("DAC1 output error");
}
extern "C" {
// hw interrupt handlers for RTIC to use for scheduling tasks
// one per priority
fn DCMI();
fn JPEG();
fn SDMMC();
}
};