• Joined on 2020-05-28
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-08-04 12:54:56 +08:00
aa47b866a1 Add AND instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-08-04 12:51:59 +08:00
9429403616 Add OR instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-08-04 12:47:42 +08:00
a3a9592c19 Add SRA instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-08-04 12:42:49 +08:00
907f7240bf Add SRL instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-08-04 12:39:35 +08:00
0c7c929983 Add XOR instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-08-04 12:37:32 +08:00
cf9e1c741c Add SLTU instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-08-04 12:34:17 +08:00
4d313ed54a Add SLT instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-08-04 12:31:44 +08:00
a6a09ac120 Add SLL instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-08-04 12:25:19 +08:00
67c57c4d7d Add SUB instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-08-04 12:20:59 +08:00
aad9a3f2b5 Add ADD instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-08-04 12:06:10 +08:00
3abdcf07d2 Add R-type instruction format
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-08-03 15:11:05 +08:00
19099edee3 Add SRAI instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-08-03 14:54:10 +08:00
eaf475ee04 Add SRLI instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-08-03 14:51:42 +08:00
0234b65890 Add SLLI instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-08-03 14:44:40 +08:00
a9cff77a82 Add I-type (shift variation) instruction format
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-08-03 14:30:00 +08:00
c3821bc885 Add SW instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-08-03 14:27:16 +08:00
948a3db1c1 Add SH instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-08-03 14:23:48 +08:00
84454e7048 Add SB instruction
dsleung pushed to feature/refactor-insns at M-Labs/riscv-formal-nmigen 2020-08-03 14:15:35 +08:00
eebb39ee27 Add S-type instruction format
dsleung pushed to master at M-Labs/riscv-formal-nmigen 2020-08-03 12:19:27 +08:00
5a78e7aba0 Fix copyright holder in license