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zynq-rs
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379 Commits 12 Branches 0 Tags 1.5 MiB
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379 Commits

Author SHA1 Message Date
Astro b33ccf83ba eth: doc 2020-06-18 18:07:50 +02:00
Astro b4bcc6cf5c TcpStream: add send_slice() 2020-06-18 01:56:49 +02:00
Astro a80a2c67ef eth: put desc list behind UncachedSlice, invalidate buffers, add barriers 2020-06-18 01:28:29 +02:00
Astro d96343c249 uncached: refactor into UncachedSlice 2020-06-18 01:28:25 +02:00
Astro ae739146c5 cache: add the required barriers 2020-06-18 01:27:34 +02:00
Astro f50018092c mmu: add early memory barrier to L1Table.update() 2020-06-18 01:27:34 +02:00
Astro 7c4d390ce4 libcortex_a9: start Uncached 2020-06-18 01:27:34 +02:00
Astro 6761575b30 mmu: add L1Table.update() 2020-06-18 01:27:34 +02:00
Astro aebce435e2 mmu: switch bufferable=1 (writeback) for DDR pages 2020-06-18 01:27:34 +02:00
pca006132 98f5099684 removed newline character 2020-06-16 17:36:01 +08:00
pca006132 2c3fa991ad implemented display trait for errors 2020-06-16 17:36:01 +08:00
pca006132 2c14a2a1a2
fixed global timer reset 2020-06-16 17:31:37 +08:00
pca006132 191da7c959
Added Copy trait for Milliseconds struct. 2020-06-16 14:56:29 +08:00
pca006132 d52466cacf
DevC driver refactored. 2020-06-16 14:55:53 +08:00
pca006132 a17a5d2925 sdcard: Changed some debug to trace. 2020-06-15 16:54:30 +08:00
pca006132 e0f26871db devc working! 2020-06-15 16:07:31 +08:00
Sebastien Bourdeauducq 82ec1ba7a7 sdio: better logging 2020-06-13 16:31:25 +08:00
pca006132 d3b488bfb3 standard capacity support 2020-06-11 10:21:01 +08:00
Astro 074b3547de sdio: fix unsound MaybeUninit usage 2020-06-11 10:07:19 +08:00
Astro 316ea61702 sdio: move ADMA2_DESCR32_TABLE into SdCard 2020-06-11 10:07:19 +08:00
Astro 1586190712 sdio: turn Adma2Desc32.attribute into a register! 2020-06-11 10:07:19 +08:00
Astro 32349e9dec sdio: convert Adma2Desc32 to VolatileCells, make ADMA2_DESCR32_TABLE: MaybeUninit 2020-06-11 10:07:19 +08:00
Astro b942cdcbc8 sdio: change Adma2Desc32 alignment from 1 to 4 
this should not break anything.
 2020-06-11 10:07:19 +08:00
Astro a1a211334f eth: always just allocate desc list + buffers 
buffers are allocated vec anyway. this removes the lifetime hack and
further prepares work on cache-line alignment to enable L1 writeback.
 2020-06-11 00:21:18 +02:00
Astro 187ef703f2 experiments: use stream.close() instead of .flush() 2020-06-10 20:21:01 +02:00
pca006132 cf17a1c60a removed unneeded methods 2020-06-10 12:55:22 +08:00
pca006132 5332587de6 Changed mutability 2020-06-10 12:54:50 +08:00
pca006132 0ebc4a61c8 Modified SDIO to handle u8 buffer instead of u32. 2020-06-09 17:03:17 +08:00
pca006132 40d5eb8232 fixed compilation error 2020-06-05 12:27:41 +08:00
pca006132 d01d0f69a4 formatting commit 2020-06-05 12:27:19 +08:00
pca006132 236592ae66 SDIO module completed 2020-06-05 12:27:12 +08:00
Sebastien Bourdeauducq a53ed8acc8 add remote run script 2020-06-04 19:57:52 +08:00
Astro 7695d6d8df openocd: fix cora z7-10 PL_TAPID 2020-05-16 01:34:09 +02:00
Astro 2c82fb793e Merge pull request 'sdio-registers' (#29) 2020-05-15 06:44:32 +08:00
Astro 0c48dd934e libboard_zynq: fix sclr::ddriob_ddr_ctrl vref_int_en 2020-05-10 22:14:55 +02:00
Astro 3841accd9c libboard_zynq: fix ddr memtest range 2020-05-09 02:53:58 +02:00
Astro 3e02980c20 libboard_zynq: fix access to "full" 1022 MB on target_zc706 2020-05-09 02:35:39 +02:00
Astro 66cd0c7630 libcortex_a9: allow access for full 1GB of DDR 2020-05-09 02:35:39 +02:00
Sebastien Bourdeauducq 4e1f46b3e2 core1: support redirecting vectors to sdram 2020-05-06 22:07:12 +08:00
pca 73b0ec9837 fixed typo 2020-05-06 13:58:46 +08:00
pca 4acee21c05 Merge branch 'master' of git.m-labs.hk:M-Labs/zc706 into sdio-registers 2020-05-06 11:06:38 +08:00
Sebastien Bourdeauducq ce844f1b02 devc: add is_done() 2020-05-04 22:16:53 +08:00
Sebastien Bourdeauducq 60e996a121 update cargoSha256 2020-05-03 09:58:58 +08:00
Sebastien Bourdeauducq 27094da9ff nix: disable post-installation fixup on ARM binaries 2020-05-03 09:47:58 +08:00
Astro c955eaae7f libboard_zynq: flush Uart by waiting for tx idle 2020-05-02 23:32:01 +02:00
Astro 0f666c570c libboard_zynq: remove unneeded Uart flush 2020-05-02 23:30:45 +02:00
pca 244ccdeac2 finished register definitions 2020-05-01 15:38:07 +08:00
Sebastien Bourdeauducq e047c2900b ddr: log clock info with debug level 2020-05-01 12:27:43 +08:00
Astro d86f69a253 Cargo.lock: cargo update 2020-05-01 01:53:39 +02:00
Astro 877f2c34bd libboard_zynq: use log logging 2020-05-01 01:46:42 +02:00