uncached: refactor into UncachedSlice

libcortex_a9/src/lib.rs

@@ -8,8 +8,9 @@ pub mod asm;
 pub mod regs;
 pub mod cache;
 pub mod mmu;
-pub mod uncached;
 pub mod mutex;
 pub mod sync_channel;
+mod uncached;
+pub use uncached::UncachedSlice;
 
 global_asm!(include_str!("exceptions.s"));

libcortex_a9/src/uncached.rs

@@ -2,26 +2,26 @@ use core::{
     ops::{Deref, DerefMut},
     mem::{align_of, size_of},
 };
-use alloc::alloc::{alloc_zeroed, dealloc, Layout, LayoutErr};
+use alloc::alloc::{dealloc, Layout, LayoutErr};
 use crate::mmu::{L1_PAGE_SIZE, L1Table};
 
-pub struct Uncached<'t, T: 't> {
+pub struct UncachedSlice<T: 'static> {
     layout: Layout,
-    data: &'t mut T,
+    slice: &'static mut [T],
 }
 
-impl<'t, T: 't> Uncached<'t, T> {
+impl<T> UncachedSlice<T> {
     /// allocates in chunks of 1 MB
-    pub fn alloc(src: T) -> Result<Self, LayoutErr> {
+    pub fn new<F: Fn() -> T>(len: usize, default: F) -> Result<Self, LayoutErr> {
         // round to full pages
-        let size = (size_of::<T>() | (L1_PAGE_SIZE - 1)) + 1;
+        let size = ((len * size_of::<T>() - 1) | (L1_PAGE_SIZE - 1)) + 1;
         let align = align_of::<T>()
             .max(L1_PAGE_SIZE);
         let layout = Layout::from_size_align(size, align)?;
         let ptr = unsafe { alloc::alloc::alloc(layout).cast::<T>() };
-        assert_eq!((ptr as usize) & (L1_PAGE_SIZE - 1), 0);
-
         let start = ptr as usize;
+        assert_eq!(start & (L1_PAGE_SIZE - 1), 0);
+
         for page_start in (start..(start + size)).step_by(L1_PAGE_SIZE) {
             L1Table::get()
                 .update(page_start as *const (), |l1_section| {
@@ -29,34 +29,37 @@ impl<'t, T: 't> Uncached<'t, T> {
                     l1_section.bufferable = false;
                 });
         }
-        
+
+        let slice = unsafe { core::slice::from_raw_parts_mut(ptr, len) };
+        // verify size
+        assert!(unsafe { slice.get_unchecked(len) } as *const _ as usize <= start + size);
         // initialize
-        unsafe {
-            core::ptr::write(ptr, src);
+        for e in slice.iter_mut() {
+            *e = default();
         }
-        let data = unsafe { &mut *ptr };
-        Ok(Uncached { layout, data })
+        Ok(UncachedSlice { layout, slice })
     }
 }
 
-impl<'t, T: 't> Drop for Uncached<'t, T> {
+/// Does not yet mark the pages cachable again
+impl<T> Drop for UncachedSlice<T> {
     fn drop(&mut self) {
         unsafe {
-            dealloc(self.data as *mut _ as *mut u8, self.layout);
+            dealloc(self.slice.as_mut_ptr() as *mut _ as *mut u8, self.layout);
         }
     }
 }
 
-impl<'t, T: 't> Deref for Uncached<'t, T> {
-    type Target = T;
+impl<T> Deref for UncachedSlice<T> {
+    type Target = [T];
 
     fn deref(&self) -> &Self::Target {
-        self.data
+        self.slice
     }
 }
 
-impl<'t, T: 't> DerefMut for Uncached<'t, T> {
+impl<T> DerefMut for UncachedSlice<T> {
     fn deref_mut(&mut self) -> &mut Self::Target {
-        self.data
+        self.slice
     }
 }

libsupport_zynq/src/ram.rs

@@ -8,7 +8,7 @@ use libboard_zynq::ddr::DdrRam;
 #[global_allocator]
 static ALLOCATOR: CortexA9Alloc = CortexA9Alloc(Mutex::new(Heap::empty()));
 
-/// LockedHeap doesn't locking properly
+/// LockedHeap doesn't lock properly
 struct CortexA9Alloc(Mutex<Heap>);
 
 unsafe impl Sync for CortexA9Alloc {}