1f05e6977e
eth::phy: replace ExtendedStatus with PSSR
2020-07-29 21:49:18 +02:00
e408a8b22d
eth::phy::extended_status: fix cap_1000base_x_full() bit position
2020-07-29 21:29:28 +02:00
27effb6257
eth::phy: s/Marvel/Marvell/
2020-07-29 20:08:38 +02:00
de5f605d60
eth: refactor peripheral instance into type parameter, improve clock setup
2020-07-29 19:45:01 +02:00
ef4fb598fb
ddr: improve dci divisors calculation
2020-07-28 00:43:33 +02:00
f36b1a610e
timer::global: wrap us in Microseconds, impl embedded_hal blocking delay traits
2020-07-22 23:41:15 +02:00
7f45d10af3
timer::global::CountDown: fix delaying from "up to" to "at least" the timespan
2020-07-22 22:43:10 +02:00
855d94c48e
dmac: remove unused module
2020-07-20 19:42:32 +02:00
f8785c3f07
fix some compilation warnings
2020-07-19 15:39:08 +08:00
484e385160
eth: implement DeviceCapabilities.max_burst_size
...
this is a hint that /could/ boost TCP performance.
2020-07-16 00:17:13 +02:00
371e59cef5
libboard_zynq: add fpgax_clk_ctrl registers
2020-07-07 19:37:51 +08:00
e4e7141bf3
ddr: delint
2020-07-06 19:46:18 +02:00
0c60d684e4
slcr: remove soft reset
...
Does not work and probably difficult to get to work.
2020-07-06 13:06:10 +08:00
21c0c5cbc8
Revert "simplify ps7_init"
...
What the simplified ps7_init does can now be reproduced by the DDRC driver.
On the other hand, we are still experiencing crazy Zynq instability issues, so keep the original ps7_init around for debugging.
This reverts commit 9fcf9243f2
2020-07-06 11:55:04 +08:00
90904634cd
DDR: fixed register write.
...
Previously it writes `0x20066`, while the ps7_init set it to be
`0x200066`, notice the 1 more 0.
This should perform the same writes to the registers, so we do not have
to apply the ps7_init in artiq_zynq.
2020-07-06 11:46:37 +08:00
ae4d3e2455
smoltcp: enable IPv6
2020-07-06 11:30:48 +08:00
9fcf9243f2
simplify ps7_init
2020-07-06 00:52:40 +08:00
f0697c3ec3
ddr: implement additional configuration
2020-07-03 02:20:10 +02:00
b2c707d543
ddr: remove superfluous _reg from register names
2020-07-03 02:20:10 +02:00
c0e66a632c
ps7_init: move from experiments to libboard_zynq
2020-06-25 01:40:42 +02:00
b33ccf83ba
eth: doc
2020-06-18 18:07:50 +02:00
a80a2c67ef
eth: put desc list behind UncachedSlice, invalidate buffers, add barriers
2020-06-18 01:28:29 +02:00
98f5099684
removed newline character
2020-06-16 17:36:01 +08:00
2c3fa991ad
implemented display trait for errors
2020-06-16 17:36:01 +08:00
2c14a2a1a2
fixed global timer reset
2020-06-16 17:31:37 +08:00
191da7c959
Added Copy trait for Milliseconds struct.
2020-06-16 14:56:29 +08:00
d52466cacf
DevC driver refactored.
2020-06-16 14:55:53 +08:00
a17a5d2925
sdcard: Changed some debug to trace.
2020-06-15 16:54:30 +08:00
e0f26871db
devc working!
2020-06-15 16:07:31 +08:00
82ec1ba7a7
sdio: better logging
2020-06-13 16:31:25 +08:00
d3b488bfb3
standard capacity support
2020-06-11 10:21:01 +08:00
074b3547de
sdio: fix unsound MaybeUninit usage
2020-06-11 10:07:19 +08:00
316ea61702
sdio: move ADMA2_DESCR32_TABLE into SdCard
2020-06-11 10:07:19 +08:00
1586190712
sdio: turn Adma2Desc32.attribute into a register!
2020-06-11 10:07:19 +08:00
32349e9dec
sdio: convert Adma2Desc32 to VolatileCells, make ADMA2_DESCR32_TABLE: MaybeUninit
2020-06-11 10:07:19 +08:00
b942cdcbc8
sdio: change Adma2Desc32 alignment from 1 to 4
...
this should not break anything.
2020-06-11 10:07:19 +08:00
a1a211334f
eth: always just allocate desc list + buffers
...
buffers are allocated vec anyway. this removes the lifetime hack and
further prepares work on cache-line alignment to enable L1 writeback.
2020-06-11 00:21:18 +02:00
cf17a1c60a
removed unneeded methods
2020-06-10 12:55:22 +08:00
5332587de6
Changed mutability
2020-06-10 12:54:50 +08:00
0ebc4a61c8
Modified SDIO to handle u8 buffer instead of u32.
2020-06-09 17:03:17 +08:00
236592ae66
SDIO module completed
2020-06-05 12:27:12 +08:00
2c82fb793e
Merge pull request 'sdio-registers' ( #29 )
2020-05-15 06:44:32 +08:00
0c48dd934e
libboard_zynq: fix sclr::ddriob_ddr_ctrl vref_int_en
2020-05-10 22:14:55 +02:00
3841accd9c
libboard_zynq: fix ddr memtest range
2020-05-09 02:53:58 +02:00
3e02980c20
libboard_zynq: fix access to "full" 1022 MB on target_zc706
2020-05-09 02:35:39 +02:00
73b0ec9837
fixed typo
2020-05-06 13:58:46 +08:00
4acee21c05
Merge branch 'master' of git.m-labs.hk:M-Labs/zc706 into sdio-registers
2020-05-06 11:06:38 +08:00
ce844f1b02
devc: add is_done()
2020-05-04 22:16:53 +08:00
c955eaae7f
libboard_zynq: flush Uart by waiting for tx idle
2020-05-02 23:32:01 +02:00
0f666c570c
libboard_zynq: remove unneeded Uart flush
2020-05-02 23:30:45 +02:00
244ccdeac2
finished register definitions
2020-05-01 15:38:07 +08:00
e047c2900b
ddr: log clock info with debug level
2020-05-01 12:27:43 +08:00
877f2c34bd
libboard_zynq: use log logging
2020-05-01 01:46:42 +02:00
619ebf147c
libsupport_zynq: move mod logger to libboard_zynq
2020-05-01 01:33:40 +02:00
0d4d021b1b
clean up
2020-05-01 01:17:53 +02:00
d9e8a667bd
some macro changes and more registers
2020-04-29 21:19:24 +08:00
b22cc4e2b6
various control registers
2020-04-29 09:34:17 +08:00
3238dae99f
started writing register definitions
2020-04-28 23:00:47 +08:00
aa93794632
libboard_zynq: add GlobalTimer::get_us(), use in libsupport_zynq::logger
2020-04-25 03:01:19 +02:00
fe6a058a6b
libboard_zynq: find prescaler for GlobalTimer, rename new() to start()
2020-04-25 02:59:48 +02:00
88a2a2bc71
libasync, libboard_zynq: add block_async glue, make GlobalTimer sharable
2020-04-25 01:18:49 +02:00
8012573a8f
libboard_zynq: impl embedded_hal CountDown for GlobalTimer
2020-04-25 00:44:32 +02:00
4ab6fb6271
libboard_zynq: use Void in uart embedded_hal impl
2020-04-25 00:28:17 +02:00
f835192c0a
libboard_zynq: add GlobalTimer implementation
2020-04-25 00:18:45 +02:00
04c47b9bdb
libboard_zynq: impl embedded_hal serial write traits for Uart
2020-04-24 21:31:37 +02:00
f8782f3f69
libboard_zynq: let println!() write no '\r'
2020-04-20 23:44:16 +02:00
4b346f5c55
libboard_zynq: fix flash manual_mode chip_index
2020-04-10 20:41:16 +02:00
2dda3ca4e6
libboard_zynq: delint
2020-04-10 20:41:16 +02:00
c3ebafa6ed
libboard_zynq: fix flash read
2020-04-06 22:41:49 +02:00
8a98cef3fc
libboard_zynq: fix some hw setup
2020-04-03 00:17:25 +02:00
46af38906e
libboard_zynq: wrap eth Buffer for alignment
2020-03-29 00:08:43 +01:00
ed52ead914
cora ddr attempts
2020-03-28 21:50:06 +01:00
ab75be80ba
update smoltcp to 0.6.0
2020-03-25 22:24:01 +01:00
319f7d9eef
move smoltcp dependency to libboard_zynq only
2020-03-25 22:23:30 +01:00
a0c95c3b3e
remove superfluous dependencies
2020-03-25 21:54:29 +01:00
97e7605804
update dependency r0
2020-03-25 21:52:23 +01:00
000741d05a
update rust-nightly + linked_list_allocator
2020-03-25 21:47:51 +01:00
29bf29a037
add some fpga regs
2020-03-25 13:02:01 +01:00
03da85dcea
libboard_zynq::dmac: enable mod, add channel_regs()
2020-02-03 23:04:26 +01:00
d7e8ba297b
libboard_zynq::dmac: unify equal registers
2020-02-03 22:11:44 +01:00
f9cb2e7cb0
delint
2020-01-30 23:18:14 +01:00
aae85981e2
libboard_zynq::clocks: setup clock sources and cpu clock
2020-01-23 23:15:10 +01:00
77f440db33
libboard_zynq::stdio: add drop_uart()
...
drops locks and causes reinitialization which is needed for exceptions
and clock canges.
2020-01-23 23:14:50 +01:00
99a2e5d621
libboard_zynq::slcr: fix arm_clk_ctrl srcsel, doc
2020-01-23 23:14:50 +01:00
d88ba97a03
Merge branch 'cora'
2020-01-22 01:19:01 +01:00
6272e381f1
*/Cargo.toml: add descriptions
2020-01-22 01:17:21 +01:00
fc8e948a86
*/Cargo.toml: pass down target_* feature flags to dependencies
2020-01-22 01:17:19 +01:00
a26d187219
Merge branch 'dmac' of M-Labs/zc706 into master
2020-01-22 04:16:18 +08:00
Stewart Mackenzie
a85c2d5009
added registers for DMA controller
2020-01-20 19:27:33 +08:00
Stewart Mackenzie
a23506fb8a
added registers for device configuration interface (devc)
2020-01-20 19:26:29 +08:00
9199bb7a16
libboard_zynq::flash: use only 32-bit spi words in program()
2019-12-22 03:14:18 +01:00
da60be38b1
libboard_zynq::flash: move man_start_com(true) into wait_tx_fifo_flush()
2019-12-22 03:13:38 +01:00
6c4b07e0cf
libboard_zynq::flash: syntax
2019-12-22 03:12:53 +01:00
cf1983e543
split into lib{register, cortex_a9, board_zynq, board_zc706} crates
2019-12-17 23:35:58 +01:00
