 Simon Renblad
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3e59dcbc94
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remove UB assert in uncached
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2024-10-31 15:09:14 +08:00 |
|
Simon Renblad
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aef7dcabae
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fix const in arr expression
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2024-10-31 15:09:09 +08:00 |
|
Simon Renblad
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49a84da2ce
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migrate inline asm macro
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2024-10-22 12:12:16 +08:00 |
|
Simon Renblad
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b00f297cd0
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up rust edition to 2021
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2024-10-22 12:10:39 +08:00 |
 morgan
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298f64a2f9
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boot: enable FIQ
asm: add FIQ enable instruction
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2024-02-02 16:34:28 +08:00 |
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morgan
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24c804e6f0
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libcortex_a9: add interrupt exit support for interrupt_handler macro (#107)
Co-authored-by: morgan <mc@m-labs.hk>
Co-committed-by: morgan <mc@m-labs.hk>
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2023-11-20 12:30:27 +08:00 |
 mwojcik
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605c8f73a6
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mutex: add async version of lock
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2022-05-25 10:22:16 +08:00 |
 pca006132
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06c646e61f
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libcortex_a9: added interrupt_handler macro
closes #73
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2021-01-28 11:41:34 +08:00 |
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pca006132
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b50540915d
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libcortex_a9: memcpy throughput optimization
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2021-01-26 11:16:37 +08:00 |
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pca006132
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d62c77e6e0
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libcortex_a9: fixed usage of deprecated APIs
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2021-01-15 17:08:20 +08:00 |
 Astro
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02217f27d1
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libcortex_a9: remove useless target_* features
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2020-11-19 19:38:57 +01:00 |
|
Astro
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0714162113
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rename target_cora_z7_10 to target_coraz7 globally
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2020-11-13 17:56:47 +01:00 |
 Sebastien Bourdeauducq
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a6955edf14
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add Red Pitaya support (WIP)
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2020-09-09 20:10:05 +08:00 |
|
Sebastien Bourdeauducq
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c634313d5e
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update authors in cargo.toml
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2020-09-09 19:36:25 +08:00 |
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pca006132
|
ae244082ed
|
more cpu options
|
2020-09-07 16:13:51 +08:00 |
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pca006132
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02c67051e8
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CPU options for better performance
L2 cache options and prefetch options
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2020-09-04 16:38:48 +08:00 |
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pca006132
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08fd1391c5
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libcortex_a9/mmu: enabled program flow prediction
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2020-09-04 13:18:39 +08:00 |
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pca006132
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157439bc88
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libcortex_a9/semaphore: mark new as const fn
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2020-09-02 09:51:52 +08:00 |
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pca006132
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73e4e4fd03
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libcortex_a9/sync_channel: fixed memory leak
ptr::drop_in_place would not drop the box content properly,
the best way is to convert it back to a box and implicitly drop it.
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2020-08-27 17:03:26 +08:00 |
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pca006132
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c13ca614ef
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libcortex_a9/mutex: use AcqRel for CAS operations
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2020-08-24 15:24:20 +08:00 |
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pca006132
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511c906d4d
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libcortex_a9/uncached: fixed mmu setting
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2020-08-20 13:01:49 +08:00 |
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pca006132
|
283bc9b810
|
libcortex_a9: added L2 cache
|
2020-08-20 13:01:17 +08:00 |
|
pca006132
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fa07bdb681
|
libcortex_a9/mmu: share ocm3.
This fixes issue #54.
|
2020-08-07 15:10:38 +08:00 |
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pca006132
|
3958953ceb
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libcortex_a9/sync_channel: added drop_elements function.
|
2020-08-05 15:29:28 +08:00 |
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pca006132
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25c6d5eeaa
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Changes usage of sev/wfe to spinlock functions.
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2020-08-04 13:54:19 +08:00 |
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pca006132
|
9e97102e12
|
libcortex_a9: implemented semaphore.
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2020-08-04 13:34:08 +08:00 |
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pca006132
|
b65606f2d0
|
libcortex_a9/sync_channel: added reset.
|
2020-08-03 15:50:31 +08:00 |
|
pca006132
|
12669124a4
|
libcortex_a9/mutex: added interrupt critical section mask.
|
2020-08-03 12:35:17 +08:00 |
|
pca006132
|
8f0a6bd5ea
|
libsupport_zynq/abort: restart core1 main on core1 IRQ#0.
|
2020-08-03 12:35:17 +08:00 |
|
pca006132
|
c1f61b5673
|
libcortex_a9/boot: enable IRQ on reset.
|
2020-08-03 12:35:17 +08:00 |
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pca006132
|
b099c56569
|
libcortex_a9/sync_channel: new version compiled.
|
2020-07-28 12:36:16 +08:00 |
|
pca006132
|
074438c3c7
|
libcortex_a9: added `try_lock` for mutex.
|
2020-07-15 16:44:01 +08:00 |
|
Astro
|
191abf6b8f
|
mpidr: wrap with proper bitfield getters
Prevents callers from dealing with CORE_MASK.
|
2020-07-08 00:04:54 +02:00 |
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pca006132
|
90e33f688a
|
FPU: moved enable function to zc706
|
2020-07-03 16:02:34 +08:00 |
|
Astro
|
c6fa18344e
|
uncached: disable cachable/bufferable
|
2020-06-26 22:32:49 +02:00 |
|
Astro
|
5c69bbdad6
|
mmu: fix L1Table.update() flush
|
2020-06-26 22:31:56 +02:00 |
|
Astro
|
d96343c249
|
uncached: refactor into UncachedSlice
|
2020-06-18 01:28:25 +02:00 |
|
Astro
|
ae739146c5
|
cache: add the required barriers
|
2020-06-18 01:27:34 +02:00 |
|
Astro
|
f50018092c
|
mmu: add early memory barrier to L1Table.update()
|
2020-06-18 01:27:34 +02:00 |
|
Astro
|
7c4d390ce4
|
libcortex_a9: start Uncached
|
2020-06-18 01:27:34 +02:00 |
|
Astro
|
6761575b30
|
mmu: add L1Table.update()
|
2020-06-18 01:27:34 +02:00 |
|
Astro
|
aebce435e2
|
mmu: switch bufferable=1 (writeback) for DDR pages
|
2020-06-18 01:27:34 +02:00 |
|
pca006132
|
5332587de6
|
Changed mutability
|
2020-06-10 12:54:50 +08:00 |
|
Astro
|
66cd0c7630
|
libcortex_a9: allow access for full 1GB of DDR
|
2020-05-09 02:35:39 +02:00 |
|
Astro
|
0d4d021b1b
|
clean up
|
2020-05-01 01:17:53 +02:00 |
|
Astro
|
2c756ba32e
|
libcortex_a9: migrate from asm! to llvm_asm! to avoid future breakage
|
2020-05-01 01:11:35 +02:00 |
|
Astro
|
008a995429
|
libcortex_a9: remove mmu::l1_table alignment through linker script
no longer needed, #[repr(16384)] works now
|
2020-04-30 03:38:27 +02:00 |
|
Astro
|
282b4dc69a
|
link.x: reduce alignment, use all remaining OCM for .stack
|
2020-04-28 02:50:07 +02:00 |
|
Sebastien Bourdeauducq
|
614b1ef350
|
regs: add MVBAR and HVBAR
|
2020-04-27 12:49:18 +08:00 |
|
Sebastien Bourdeauducq
|
fefd2a4ceb
|
regs: add VBAR
|
2020-04-27 12:34:15 +08:00 |