|
|
a3eabf1947
|
libboard_zynq: prepare target_kasli_soc
|
2020-11-19 19:28:17 +01:00 |
|
|
|
0714162113
|
rename target_cora_z7_10 to target_coraz7 globally
|
2020-11-13 17:56:47 +01:00 |
|
|
|
7e22010d7d
|
libboard_zynq: fix pll_cp/pll_res swap in ClockSource::setup()
|
2020-11-08 22:46:43 +01:00 |
|
|
|
a6955edf14
|
add Red Pitaya support (WIP)
|
2020-09-09 20:10:05 +08:00 |
|
|
|
1a96a7550a
|
libboard_zynq: make RegisterBlock constructors more consistent
|
2020-08-13 14:49:26 +08:00 |
|
|
|
236592ae66
|
SDIO module completed
|
2020-06-05 12:27:12 +08:00 |
|
|
|
877f2c34bd
|
libboard_zynq: use log logging
|
2020-05-01 01:46:42 +02:00 |
|
|
|
f9cb2e7cb0
|
delint
|
2020-01-30 23:18:14 +01:00 |
|
|
|
aae85981e2
|
libboard_zynq::clocks: setup clock sources and cpu clock
|
2020-01-23 23:15:10 +01:00 |
|
