morgan
0a66f4c343
sim: rename collector to phase_collector sim: add period_collector for gtx tags sim: trigger helper PLL after period_collector_r sim: remove cycle slip compensation sim: generator gtx in time loop wave_gen: replace square generator with phase accumulator wave_gen&wrpll: add white_noise generator docs: remove section & png about cycle slipping and deglitcher failure
1.2 KiB
1.2 KiB
WRPLL simulation
A time domain simulation for WRPLL
Installing dependencies
Nix:
nix develop
Others:
python -m venv .venv
source .venv/bin/activate
(venv) pip install -r requirements.txt
Quick start
-
Three notebook examples are included
helper_PLL_example.ipynb: helper PLL onlymain_PLL_example.ipynb: main PLL only with a user specific helper frequencyboth_PLL_example.ipynb: main and helper PLL
-
RAM usage and execution time estimate for simulation ONLY
-
100,000,000 time steps: 6GiB RAM and 12 seconds
-
200,000,000 time steps: 11GiB RAM and 20 seconds
-
300,000,000 time steps: 16GiB RAM and 35 seconds
-
WRPLL formulas
-
Assume the difference between
f_{main}, f_{gtx}is very small-
Let
f_{in} = f_{main} = f_{gtx} -
f_{helper} = f_{in} * \dfrac{N-1}{N} -
f_{beat} = f_{in} - f_{helper} = \dfrac{f_{in}}{N}
-
-
Main and helper Si549 DCXO ADPLL setting
ADPLL = \dfrac{\Delta f_{outppm}}{0.0001164}
Limitation
As the simulation is not cycle nor delay accurate, there will be more glitches than the hardware implementation