vexriscv-rust/Cargo.toml

[package]
name = "riscv"
version = "0.3.0"
repository = "https://github.com/rust-embedded/riscv"
authors = ["David Craven <david@craven.ch>"]
categories = ["embedded", "hardware-support", "no-std"]
description = "Low level access to RISCV processors"
keywords = ["riscv", "register", "peripheral"]
license = "ISC"

[dependencies]
bare-metal = "0.2.0"
bit_field = "0.9.0"

[features]
const-fn = ["bare-metal/const-fn"]
inline-asm = []