M-Labs/vexriscv-rust
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Do not require const-fn and asm features

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This commit is contained in:
Vadim Kaushan 2018-12-22 10:32:52 +01:00
parent 3652547073
commit 41378757c0
5 changed files with 75 additions and 49 deletions
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1
Cargo.toml
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@ -13,4 +13,5 @@ bare-metal = "0.2.0"
bit_field = "0.9.0"
[features]
const-fn = ["bare-metal/const-fn"]
inline-asm = []

2
ci/script.sh
View File

@ -4,7 +4,7 @@ main() {
cargo check --target $TARGET
if [ $TRAVIS_RUST_VERSION = nightly ]; then
cargo check --target $TARGET --features inline-asm
cargo check --target $TARGET --features 'const-fn inline-asm'
fi
}

23
src/asm.rs
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@ -5,8 +5,12 @@ macro_rules! instruction {
#[inline]
pub unsafe fn $fnname() {
match () {
#[cfg(riscv)]
#[cfg(all(riscv, feature = "inline-asm"))]
() => asm!($asm :::: "volatile"),
#[cfg(all(riscv, not(feature = "inline-asm")))]
() => unimplemented!(),
#[cfg(not(riscv))]
() => unimplemented!(),
}
@ -22,11 +26,16 @@ instruction!(sfence_vma_all, "sfence.vma");
#[inline]
#[cfg(riscv)]
#[allow(unused_variables)]
pub unsafe fn sfence_vma(asid: usize, addr: usize) {
asm!("sfence.vma $0, $1" :: "r"(asid), "r"(addr) :: "volatile");
}
match () {
#[cfg(all(riscv, feature = "inline-asm"))]
() => asm!("sfence.vma $0, $1" :: "r"(asid), "r"(addr) :: "volatile"),
#[inline]
#[cfg(not(riscv))]
pub fn sfence_vma(_asid: usize, _addr: usize) {}
#[cfg(all(riscv, not(feature = "inline-asm")))]
() => unimplemented!(),
#[cfg(not(riscv))]
() => unimplemented!(),
}
}

3
src/lib.rs
View File

@ -8,8 +8,7 @@
#![no_std]
#![deny(warnings)]
#![feature(asm)]
#![feature(const_fn)]
#![cfg_attr(feature = "inline-asm", feature(asm))]
extern crate bare_metal;
extern crate bit_field;

95
src/register/macros.rs
View File

@ -2,17 +2,21 @@ macro_rules! read_csr {
($csr_number:expr) => {
/// Reads the CSR
#[inline]
#[cfg(riscv)]
unsafe fn _read() -> usize {
let r: usize;
asm!("csrrs $0, $1, x0" : "=r"(r) : "i"($csr_number) :: "volatile");
r
}
match () {
#[cfg(all(riscv, feature = "inline-asm"))]
() => {
let r: usize;
asm!("csrrs $0, $1, x0" : "=r"(r) : "i"($csr_number) :: "volatile");
r
}
#[inline]
#[cfg(not(riscv))]
unsafe fn _read() -> usize {
unimplemented!()
#[cfg(all(riscv, not(feature = "inline-asm")))]
() => unimplemented!(),
#[cfg(not(riscv))]
() => unimplemented!(),
}
}
};
}
@ -21,17 +25,21 @@ macro_rules! read_csr_rv32 {
($csr_number:expr) => {
/// Reads the CSR
#[inline]
#[cfg(riscv32)]
unsafe fn _read() -> usize {
let r: usize;
asm!("csrrs $0, $1, x0" : "=r"(r) : "i"($csr_number) :: "volatile");
r
}
match () {
#[cfg(all(riscv32, feature = "inline-asm"))]
() => {
let r: usize;
asm!("csrrs $0, $1, x0" : "=r"(r) : "i"($csr_number) :: "volatile");
r
}
#[inline]
#[cfg(not(riscv32))]
unsafe fn _read() -> usize {
unimplemented!()
#[cfg(all(riscv32, not(feature = "inline-asm")))]
() => unimplemented!(),
#[cfg(not(riscv32))]
() => unimplemented!(),
}
}
};
}
@ -76,15 +84,18 @@ macro_rules! write_csr {
($csr_number:expr) => {
/// Writes the CSR
#[inline]
#[cfg(riscv)]
#[allow(unused_variables)]
unsafe fn _write(bits: usize) {
asm!("csrrw x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile");
}
match () {
#[cfg(all(riscv, feature = "inline-asm"))]
() => asm!("csrrw x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"),
#[inline]
#[cfg(not(riscv))]
unsafe fn _write(_bits: usize) {
unimplemented!()
#[cfg(all(riscv, not(feature = "inline-asm")))]
() => unimplemented!(),
#[cfg(not(riscv))]
() => unimplemented!(),
}
}
};
}
@ -105,15 +116,18 @@ macro_rules! set {
($csr_number:expr) => {
/// Set the CSR
#[inline]
#[cfg(riscv)]
#[allow(unused_variables)]
unsafe fn _set(bits: usize) {
asm!("csrrs x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile");
}
match () {
#[cfg(all(riscv, feature = "inline-asm"))]
() => asm!("csrrs x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"),
#[inline]
#[cfg(not(riscv))]
unsafe fn _set(_bits: usize) {
unimplemented!()
#[cfg(all(riscv, not(feature = "inline-asm")))]
() => unimplemented!(),
#[cfg(not(riscv))]
() => unimplemented!(),
}
}
};
}
@ -122,15 +136,18 @@ macro_rules! clear {
($csr_number:expr) => {
/// Clear the CSR
#[inline]
#[cfg(riscv)]
#[allow(unused_variables)]
unsafe fn _clear(bits: usize) {
asm!("csrrc x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile");
}
match () {
#[cfg(all(riscv, feature = "inline-asm"))]
() => asm!("csrrc x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"),
#[inline]
#[cfg(not(riscv))]
unsafe fn _clear(_bits: usize) {
unimplemented!()
#[cfg(all(riscv, not(feature = "inline-asm")))]
() => unimplemented!(),
#[cfg(not(riscv))]
() => unimplemented!(),
}
}
};
}