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# rtio-nmigen
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Formally verified implementation of the ARTIQ RTIO core in nMigen
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## File Synopsis
- `LICENSE` : License terms (LGPLv3+) for this project
- `README.md` : this document
- `shell.nix` : Nix file for setting up the environment for this project
- `rtio` : RTIO core in nMigen
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## Running the verification tasks
Currently, only the sorting network contains assertions to be verified. To run the verification tasks for the sorting network, change directory to the root of this project and do
```bash
$ python -m rtio.test.sed.output_network
```
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## Progress
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- Devise a suitable migration strategy for `artiq.gateware.rtio` from Migen to nMigen
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- [x] Implement the core in nMigen
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- - [x] `rtio.cri` (`Interface` and `CRIDecoder` only)
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- - [x] `rtio.rtlink`
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- - [x] `rtio.sed.layouts`
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- - [x] `rtio.sed.output_network`
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- - [x] `rtio.sed.output_driver`
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- [ ] Add suitable assertions for verification (BMC / unbounded proof?)
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- - [ ] `rtio.cri` (`Interface` and `CRIDecoder` only)
- - [ ] `rtio.rtlink`
- - [ ] `rtio.sed.layouts`
- - [ ] `rtio.sed.output_network` - Sorting network (high priority)
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- - [ ] `rtio.sed.output_driver`
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- [ ] Restructure to code to follow nMigen convention and re-validate existing assertions
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## License
Copyright (C) 2020 M-Labs Limited.
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[LGPLv3 ](./LICENSE ) or any later version
