riscv-formal-nmigen/insns
2020-07-30 13:34:52 +08:00
..
insn_add.py Fix ADD instruction 2020-07-24 12:21:07 +08:00
insn_addi.py Add ADDI instruction for RV32I 2020-07-22 13:29:16 +08:00
insn_and.py Fix AND instruction 2020-07-24 12:24:43 +08:00
insn_andi.py Add ANDI instruction for RV32I 2020-07-22 13:43:56 +08:00
insn_auipc.py Refactor AUIPC instruction 2020-07-30 13:01:13 +08:00
insn_beq.py Add BEQ instruction for RV32I 2020-07-22 11:40:21 +08:00
insn_bge.py Add BGE instruction for RV32I 2020-07-22 11:59:28 +08:00
insn_bgeu.py Add BGEU instruction for RV32I 2020-07-22 12:09:00 +08:00
insn_blt.py Add BLT instruction for RV32I 2020-07-22 11:55:26 +08:00
insn_bltu.py Add BLTU instruction for RV32I 2020-07-22 12:03:38 +08:00
insn_bne.py ADD BNE instruction for RV32I 2020-07-22 11:48:45 +08:00
insn_div.py Add DIV instruction for RV32M 2020-07-24 13:25:17 +08:00
insn_divu.py Add DIVU instruction for RV32M 2020-07-24 13:27:48 +08:00
insn_general.py Create U-type instruction format 2020-07-30 12:45:32 +08:00
insn_jal.py Refactor JAL instruction 2020-07-30 13:34:52 +08:00
insn_jalr.py Add JALR instruction for RV32I 2020-07-21 17:20:34 +08:00
insn_lb.py Add LB instruction for RV32I 2020-07-22 12:25:46 +08:00
insn_lbu.py Add LBU instruction for RV32I 2020-07-22 12:46:56 +08:00
insn_lh.py Add LH instruction for RV32I 2020-07-22 12:30:52 +08:00
insn_lhu.py Add LHU instruction for RV32I 2020-07-22 12:50:45 +08:00
insn_lui.py Refactor LUI instruction 2020-07-30 12:55:57 +08:00
insn_lw.py Add LW instruction for RV32I 2020-07-22 12:42:47 +08:00
insn_mul.py Modify MUL instruction to use alternative operations 2020-07-24 13:13:03 +08:00
insn_mulh.py Add MULH instruction for RV32M 2020-07-24 13:16:47 +08:00
insn_mulhsu.py Add MULHSU instruction for RV32M 2020-07-24 13:20:05 +08:00
insn_mulhu.py Add MULHU instruction for RV32M 2020-07-24 13:22:41 +08:00
insn_or.py Fix OR instruction 2020-07-24 12:32:59 +08:00
insn_ori.py Add ORI instruction for RV32I 2020-07-22 13:42:03 +08:00
insn_rem.py Add REM instruction for RV32M 2020-07-24 13:30:06 +08:00
insn_remu.py Add REMU instruction for RV32M 2020-07-24 13:32:43 +08:00
insn_sb.py Fix SB instruction for RV32I 2020-07-22 13:05:46 +08:00
insn_sh.py Add SH instruction for RV32I 2020-07-22 13:09:53 +08:00
insn_sll.py Fix SLL instruction 2020-07-24 12:40:28 +08:00
insn_slli.py Add SLLI instruction for RV32I 2020-07-22 13:52:49 +08:00
insn_slt.py Fix SLT instruction 2020-07-24 12:42:27 +08:00
insn_slti.py Add SLTI instruction for RV32I 2020-07-22 13:33:02 +08:00
insn_sltiu.py Add SLTIU instruction for RV32I 2020-07-22 13:36:04 +08:00
insn_sltu.py Add SLTU instruction for RV32I 2020-07-22 16:08:09 +08:00
insn_sra.py Fix SRA instruction 2020-07-24 12:44:44 +08:00
insn_srai.py Add SRAI instruction for RV32I 2020-07-22 14:35:03 +08:00
insn_srl.py Fix SRL instruction 2020-07-24 12:46:24 +08:00
insn_srli.py Add SRLI instruction for RV32I 2020-07-22 13:58:02 +08:00
insn_sub.py Fix SUB instruction 2020-07-24 12:48:08 +08:00
insn_sw.py Add SW instruction for RV32I 2020-07-22 13:12:37 +08:00
insn_U_type.py Create U-type instruction format 2020-07-30 12:45:32 +08:00
insn_UJ_type.py Add UJ-type instruction format 2020-07-30 13:15:17 +08:00
insn_xor.py Fix XOR instruction 2020-07-24 12:49:33 +08:00
insn_xori.py Add XORI instruction for RV32I 2020-07-22 13:39:29 +08:00
isa_rv32i_gen.py Complete generator for RV32I ISA 2020-07-23 14:33:25 +08:00
isa_rv32i.py Complete generator for RV32I ISA 2020-07-23 14:33:25 +08:00
isa_rv32i.txt Add list of supported instructions for RV32I 2020-07-23 11:18:41 +08:00
isa_rv32im_gen.py Add RV32IM ISA 2020-07-24 13:51:04 +08:00
isa_rv32im.py Add RV32IM ISA 2020-07-24 13:51:04 +08:00
isa_rv32im.txt Add RV32IM ISA 2020-07-24 13:51:04 +08:00