Fix SB instruction for RV32I

This commit is contained in:
Donald Sebastian Leung 2020-07-22 13:05:46 +08:00
parent 9d8e230d70
commit efbc009559

View File

@ -67,8 +67,6 @@ class rvfi_insn_sb(Elaboratable):
# SB instruction
addr = Signal(self.RISCV_FORMAL_XLEN)
m.d.comb += addr.eq(self.rvfi_rs1_rdata + insn_imm)
result = Signal(8)
m.d.comb += result.eq(self.rvfi_mem_rdata)
m.d.comb += self.spec_valid.eq(self.rvfi_valid & (~insn_padding) & (insn_funct3 == 0b000) & (insn_opcode == 0b0100011))
m.d.comb += self.spec_rs1_addr.eq(insn_rs1)
m.d.comb += self.spec_rs2_addr.eq(insn_rs2)