M-Labs/riscv-formal-nmigen
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Add MULHSU instruction

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This commit is contained in:
Donald Sebastian Leung 2020-08-26 16:39:17 +08:00
parent 15580a74c6
commit a58842ea94
2 changed files with 22 additions and 0 deletions
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4
rvfi/insns/insn_mulh.py
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@ -1,5 +1,9 @@
from .insn_rv32m_r_type import *
"""
MULH instruction
"""
class InsnMulh(InsnRV32MRType):
def __init__(self, params):
super().__init__(params, 0b001)

18
rvfi/insns/insn_mulhsu.py Normal file
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@ -0,0 +1,18 @@
from .insn_rv32m_r_type import *
"""
MULHSU instruction
"""
class InsnMulhsu(InsnRV32MRType):
def __init__(self, params):
super().__init__(params, 0b010)
def elaborate(self, platform):
m = super().elaborate(platform)
if self.params.altops:
m.d.comb += self.spec_rd_wdata.eq(Mux(self.spec_rd_addr, (self.rvfi_rs1_rdata - self.rvfi_rs2_rdata) ^ 0xea3969edecfbe137, 0))
else:
m.d.comb += self.spec_rd_wdata.eq(Mux(self.spec_rd_addr, (((Mux(self.rvfi_rs1_rdata[-1], 2 ** self.params.xlen - 1, 0) << self.params.xlen) | self.rvfi_rs1_rdata) * self.rvfi_rs2_rdata) >> self.params.xlen, 0))
return m