riscv-formal-nmigen/rvfi/insns/insn_srl.py

from .insn_rv32i_r_type import *

"""
SRL instruction
"""

class InsnSrl(InsnRV32IRType):
    def __init__(self, params):
        super().__init__(params, 0b0000000, 0b101, 0b0110011)

    def elaborate(self, platform):
        m = super().elaborate(platform)

        m.d.comb += self.spec_rd_wdata.eq(Mux(self.spec_rd_addr, self.rvfi_rs1_rdata >> Mux(self.params.xlen == 64, self.rvfi_rs2_rdata[:6], self.rvfi_rs2_rdata[:5]), 0))

        return m