riscv-formal-nmigen/rvfi/insns/insn_slti.py

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from .insn_rv32i_i_type_arith import *
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"""
SLTI instruction
"""
class InsnSlti(InsnRV32IITypeArith):
def __init__(self, params):
super().__init__(params, 0b010)
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def elaborate(self, platform):
m = super().elaborate(platform)
m.d.comb += self.spec_rd_wdata.eq(Mux(self.spec_rd_addr, Value.as_signed(self.rvfi_rs1_rdata) < Value.as_signed(self.insn_imm), 0))
return m