riscv-formal-nmigen/rvfi/insns/insn_bgeu.py

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from .insn_rv32i_sb_type import *
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"""
BGEU instruction
"""
class InsnBgeu(InsnRV32ISBType):
def __init__(self, params):
super().__init__(params, 0b111)
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def elaborate(self, platform):
m = super().elaborate(platform)
next_pc = Signal(self.params.xlen)
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m.d.comb += next_pc.eq(Mux(self.rvfi_rs1_rdata >= self.rvfi_rs2_rdata, self.rvfi_pc_rdata + self.insn_imm, self.rvfi_pc_rdata + 4))
m.d.comb += self.spec_pc_wdata.eq(next_pc)
m.d.comb += self.spec_trap.eq(Mux(self.ialign16, next_pc[0] != 0, next_pc[:2] != 0) | ~self.misa_ok)
return m