2020-08-13 15:14:46 +08:00
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from insn_rv32i_sb_type import *
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2020-08-11 16:57:34 +08:00
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"""
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BGEU instruction
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"""
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class InsnBgeu(InsnRV32ISBType):
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def __init__(self, RISCV_FORMAL_ILEN, RISCV_FORMAL_XLEN, RISCV_FORMAL_CSR_MISA, RISCV_FORMAL_COMPRESSED):
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super().__init__(RISCV_FORMAL_ILEN, RISCV_FORMAL_XLEN, RISCV_FORMAL_CSR_MISA, RISCV_FORMAL_COMPRESSED, 0b111)
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def elaborate(self, platform):
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m = super().elaborate(platform)
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next_pc = Signal(self.RISCV_FORMAL_XLEN)
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m.d.comb += next_pc.eq(Mux(self.rvfi_rs1_rdata >= self.rvfi_rs2_rdata, self.rvfi_pc_rdata + self.insn_imm, self.rvfi_pc_rdata + 4))
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m.d.comb += self.spec_pc_wdata.eq(next_pc)
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m.d.comb += self.spec_trap.eq(Mux(self.ialign16, next_pc[0] != 0, next_pc[:2] != 0) | ~self.misa_ok)
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return m
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