8 Commits

Author	SHA1	Message	Date
Peter Drmota	20e079a381	AD9910 driver feature extension and SUServo IIR readability (#1500) ... * coredevice.ad9910: Add set_cfr2 function and extend arguments of set_cfr1 and set_sync * SUServo: Wrap CPLD and DDS devices in a list * SUServo: Refactor [nfc] Co-authored-by: drmota <peter.drmota@physics.ox.ac.uk> Co-authored-by: David Nadlinger <code@klickverbot.at>	2021-11-15 12:09:16 +08:00
Robert Jördens	9b5a46dffd	suservo: fix restart counter assertion ... c.f. #788	2018-05-31 15:56:11 +00:00
Robert Jördens	504d37b66b	suservo: add SI units functions and document ... m-labs/artiq#788	2018-05-14 12:26:49 +00:00
Robert Jördens	04240cdc08	suservo: sampler channels are reversed	2018-05-14 12:25:09 +00:00
Robert Jördens	307cd07b9d	suservo: lots of gateware/ runtime changes ... tested/validated: * servo enable/disable * dds interface, timing, io_update, mask_nu * channel control (en_out, en_iir, profile) * profile configuration (coefficients, delays, offsets, channel) * adc timings and waveforms measured * asf state readback * adc readback individual changes below: suservo: correct rtio readback suservo: example, device_db [wip] suservo: change rtio channel layout suservo: mem ports in rio domain suservo: sck clocked from rio_phy suservo: cleanup, straighten out timing suservo: dds cs polarity suservo: simplify pipeline suservo: drop unused eem names suservo: decouple adc SR from IIR suservo: expand coredevice layer suservo: start the correct stage suservo: actually load ctrl suservo: refactor/tweak adc timing suservo: implement cpld and dds init	2018-04-27 13:50:26 +02:00
Robert Jördens	105068ad90	suservo: fix restart timing	2018-04-25 15:19:49 +00:00
Robert Jördens	b44d6517d1	suservo: use 125 MHz SDR ADC ... * easier timing * natural sampling on rising edge * timing, signal robustness * adjust the servo iteration timing	2018-04-25 14:32:23 +00:00
Robert Jördens	934c41b90a	gateware: add suservo ... from fe4b60b902 m-labs/artiq#788	2018-04-23 18:24:59 +00:00