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27 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq 514ac953ce remove obsolete SI5324_AS_SYNTHESIZER config option 2023-01-12 13:01:08 +08:00
Sebastien Bourdeauducq 0a37a1a4c1 Merge branch 'syncrtio' 2023-01-12 12:58:19 +08:00
Sebastien Bourdeauducq 5da9794895 remove Sayma and Metlino support 2023-01-06 17:41:12 +08:00
Spaqin 3838dfc1d1
DRTIO: RTIO/SYS clock merge, KC705 2023-01-06 07:13:38 +08:00
Spaqin 17efc28dbe
DRTIO: RTIO/SYS clock merge 2022-12-17 15:39:54 +08:00
David Nadlinger 1e0102379b firmware: Rename si5324 crystal_{ref -> as_ckin2} [nfc] 
This would have made the issue in the pre-740543d4e code
much more obvious (the config option by itself does not
have any effect on the choice of active reference input).
 2022-12-17 02:17:12 +00:00
David Nadlinger ceabeb8d84 firmware: Fix Si5324 initialisation for satellites 
Commit 740543d4e2 had unintentionally broken DRTIO
satellites, as si5324::setup is also used there. This
imports setup_si5324_as_synthesizer() from artiq-zynq,
where the input selection was already explicitly done.

GitHub: Fixes #2028.
 2022-12-17 02:17:06 +00:00
David Nadlinger 3c7a394eff runtime/rtio_clocking: Deduplicate/document input selection [nfc] 2022-12-04 04:21:44 +00:00
David Nadlinger 740543d4e2 firmware: Fix Kasli v2 runtime rtio_clock selection 
SI5324_EXT_REF now only controls the (deprecated) fallbacks
for when the rtio_clock option is not set.
 2022-12-04 02:23:38 +00:00
David Nadlinger 261dc6b933 firmware/runtime: Fix Ext0_Synth0_*to125 log messages 2022-12-02 01:37:56 +00:00
mwojcik af0b94bb34 rtio_clock: remove 150MHz support 2022-11-01 08:12:54 +08:00
mwojcik 5cd57e8688 rtio_clocking: switch clocks and reboot 2022-11-01 08:12:54 +08:00
Spaqin 69cddc6b86
rtio_clocking: add warnings for unsupported rtio_clock settings (#1773) 2021-10-28 16:34:22 +08:00
Spaqin 9b1d7e297d
runtime: clock input specification improvements 
closes #1735
 2021-10-28 16:21:51 +08:00
Harry Ho f6d39fd6ba kc705: revive DRTIO master with updated syntax 
* KC705 master variant now uses Si5324 as synthesiser.
* Multi-channel has not been implemented yet.
 2021-01-20 15:05:31 +08:00
Sebastien Bourdeauducq 57ee57e7ea runtime: fix metlino si5324 init (2) 2020-10-14 18:41:56 +08:00
Sebastien Bourdeauducq ac35548d0f runtime: fix metlino si5324 init 2020-10-14 12:57:25 +08:00
Sebastien Bourdeauducq 35c61ce24d si5324: unify N31 settings when used as synthesizer 
Closes #1528
 2020-10-12 14:45:52 +08:00
Sebastien Bourdeauducq 9214e0f3e2 firmware: fix Si5324 CKIN selection on Kasli 2.0 
https://github.com/sinara-hw/Kasli/issues/82#issuecomment-702129805
 2020-10-02 20:35:32 +08:00
Sebastien Bourdeauducq fb0ade77a9 firmware: fix non-DRTIO build 2020-04-10 17:23:17 +08:00
Sebastien Bourdeauducq 61d4614b61 sayma: fix/cleanup DRTIO-DAC sync interaction 2020-04-06 22:34:05 +08:00
Robert Jördens e0687b77f5 si5324: 10 MHz ext_ref_frequency 
* close #1254
* tested on innsbruck2 kasli variant
* sponsored by Uni Innsbruck/AQT

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2019-11-22 18:29:12 +01:00
Sebastien Bourdeauducq 5a9bb0ecba runtime: fix incorrect 'RTIO clock failed' report 2019-06-24 23:33:13 +08:00
Sebastien Bourdeauducq 53c778ae2d runtime: fix previous commit 2019-06-14 15:53:01 +08:00
Sebastien Bourdeauducq a947867887 runtime: support Kasli Si5324 bypass via rtio_clock=e 2019-06-14 15:48:05 +08:00
Sebastien Bourdeauducq 66a66b03b4 style 2019-06-14 15:29:16 +08:00
Sebastien Bourdeauducq 87ce24e867 runtime: refactor startup and RTIO clocking initialization 2019-06-14 15:26:30 +08:00