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79 Commits

Author SHA1 Message Date
Robert Jördens e6efe830c4 ad9910: rewire sync delay tuning 
* search from wide window end
* decouple margins and minimum window size
* add note about kasli jitter

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-07 14:52:03 +00:00
Robert Jördens 6c00ab57c0 test_ad9910: relax SYNC window 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-06 19:31:38 +01:00
Robert Jördens 172633c7da test_ad9910: default to a useful seed 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-06 17:35:57 +01:00
Robert Jördens 0b2661a34d ad9910: robustify SYNC window finding 
don't integrate too long, find the window tip fast and early
a couple 100 SYNC pulses are sufficient

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-06 12:41:21 +00:00
Robert Jördens 832690af9a ad9910: flake8 [nfc] 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:44:51 +01:00
Robert Jördens 9fb850ae75 ad9910: add init bit explanation 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:37:02 +01:00
Robert Jördens 141cc7d99f ad9910: fiducial timestamp for tracking phase mode 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:58 +01:00
Robert Jördens 2f6d3f79ff ad9910: add phase modes 
* simplified and cross-referenced the explanation of the different
  phase modes.
* semantically and functionally merged absolute and tracking/coherent
  phase modes.
* simplified numerics to calculate phase correction
* added warning about possible inconsistency with DMA and default
  phase mode
* restricted __all__ imports
* moved continuous/relative phase offset tracking from an instance
  variable to a "handle" returned by set()/set_mu() in order to avoid
  state inconsistency with DMA (#1113 #1115)

for #1143

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:55 +01:00
Robert Jördens d3ad2b7633 ad9910: fix pll timeout loop 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:53 +01:00
Robert Jördens 06139c0f4d ad9910: add IO_UPDATE alignment and tuning 
for #1143

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:48 +01:00
Robert Jördens 4bbd833cfe ad9910: add io_update alignment measurement 
for #1143

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:44 +01:00
Robert Jördens 7b92282012 ad9910: add docs for sync tuning, refactor 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:42 +01:00
Robert Jördens 8a47a6b2fb ad9910: disable sync_clk output 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:40 +01:00
Robert Jördens 65e2ebf960 ad9910: add sync delay control, auto tuning 
* expose multi device sync functionality
* sync delay configuration interface
* auto-tuning of sync delay from device_db seed

for #1143

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:37 +01:00
Robert Jördens 8dbf5f87fd ad9910: simplify io_update pulsing on init, set_mu 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:35 +01:00
Robert Jördens 0b3b07a7da ad9910: add power down method 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:34 +01:00
Robert Jördens 89a961fb00 urukul, ad9912, ad9910: expose CFG RF switch better 
* conincident setting of multiple switches
* per channel setting
 2018-10-24 13:04:46 +02:00
David Nadlinger 08ee91beb2 ad9910: Clarify chip_select range [nfc] 
`assert 3 <= chip_select <= 7` is rather opaque without looking
at the CPLD source code otherwise.
 2018-07-30 11:08:17 +01:00
Robert Jördens 01f762a8f5 urukul/ad9910: support blind init 
urukul: always set io_update attribute
to silence compiler warning w.r.t. kernel_invariants
 2018-04-27 13:48:40 +02:00
Robert Jördens 37ec97eb28 ad9910/2: add sw invariant only when passed 2018-03-07 21:32:59 +01:00
Robert Jördens 5046d6a529 ad9912/10: add a bit more slack to init() 2018-02-27 23:14:44 +01:00
Robert Jördens a63fd306af urukul: use spi2 
* switch kc705 and kasli targets to spi2 gateware on urukul
* rewrite urukul, ad9912, ad9910
* update example experiments, device_dbs
 2018-02-21 15:00:28 +00:00
Robert Jördens 75c89422c9 ad991[02]: sysclk can be 1 GHz 2018-02-18 10:29:19 +00:00
Robert Jördens 2adba3ed33 urukul: document ad9912, and cpld, fix api 2018-02-14 09:45:17 +01:00
Robert Jördens ede98679fc ad9910: add documentation 2018-02-14 09:05:03 +01:00
Robert Jördens 7f1bfddeda ad9910: tweak spi timing for higher speed 2018-02-13 22:13:40 +01:00
Robert Jördens ca1fdaa190 ad9910: relax timing for faster spi clock 2018-01-22 18:27:40 +00:00
Robert Jördens 67746cc7a0 urukul: raise instead of assert, clean up 2018-01-03 19:22:36 +00:00
Robert Jördens eae7584432 ad9910: add [wip] 2018-01-03 18:43:04 +00:00