mirror of https://github.com/m-labs/artiq.git
test_ad9910: default to a useful seed
Signed-off-by: Robert Jördens <rj@quartiq.de>
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@ -414,7 +414,7 @@ class AD9910:
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self.cpld.io_update.pulse(1*us)
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@kernel
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def tune_sync_delay(self, sync_delay_seed):
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def tune_sync_delay(self, sync_delay_seed=8):
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"""Find a stable SYNC_IN delay.
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This method first locates the smallest SYNC_IN validity window at
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@ -439,10 +439,8 @@ class AD9910:
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if in_delay & 1:
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in_delay = -in_delay
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in_delay = sync_delay_seed + (in_delay >> 1)
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if in_delay < 0:
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in_delay = 0
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elif in_delay > 31:
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in_delay = 31
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if in_delay < 0 or in_delay > 31:
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continue
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self.set_sync(in_delay, window)
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self.clear_smp_err()
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# integrate SMP_ERR statistics for a few hundred cycles
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@ -81,7 +81,7 @@ class AD9910Exp(EnvExperiment):
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self.sync_scan(err, win=i)
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print(err)
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self.core.break_realtime()
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dly, win = self.dev.tune_sync_delay(self.dev.sync_delay_seed)
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dly, win = self.dev.tune_sync_delay()
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self.sync_scan(err, win=win + 1) # tighten window by 2*75ps
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self.set_dataset("dly", dly)
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self.set_dataset("win", win)
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