M-Labs/artiq-zynq
10
1
Fork 19
Code Issues 12 Pull Requests 1 Releases Wiki Activity

117_rtio_channels #147

Merged
sb10q merged 10 commits from mwojcik/artiq-zynq:117_rtio_channels into master 2021-10-13 17:20:25 +08:00
Conversation 0 Commits 10 Files Changed 1 +20 -7
1 changed files with 20 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files
Showing only changes of commit bbb8c59ade - Show all commits

27
src/gateware/zc706.py
View File

@ -88,6 +88,17 @@ si5324_fmc33 = [
),
]
pmod1_33 = [
("pmod1_33", 0, Pins("AJ21"), IOStandard("LVCMOS33")),
("pmod1_33", 1, Pins("AK21"), IOStandard("LVCMOS33")),
("pmod1_33", 2, Pins("AB21"), IOStandard("LVCMOS33")),
("pmod1_33", 3, Pins("AB16"), IOStandard("LVCMOS33")),
("pmod1_33", 4, Pins("Y20"), IOStandard("LVCMOS33")),
("pmod1_33", 5, Pins("AA20"), IOStandard("LVCMOS33")),
("pmod1_33", 6, Pins("AC18"), IOStandard("LVCMOS33")),
("pmod1_33", 7, Pins("AC19"), IOStandard("LVCMOS33")),
]
def prepare_zc706_platform(platform):
platform.toolchain.bitstream_commands.extend([
@ -464,6 +475,7 @@ class _NIST_CLOCK_RTIO:
platform = self.platform
platform.add_extension(nist_clock.fmc_adapter_io)
platform.add_extension(leds_fmc33)
platform.add_extension(pmod1_33)
platform.add_extension(_ams101_dac)
platform.add_extension(_sdcard_spi_33)
@ -484,10 +496,10 @@ class _NIST_CLOCK_RTIO:
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512))
# todo: figure out what to do since zc706 has no SMA I/O
# phy = ttl_serdes_7series.InOut_8X(platform.request("user_sma_gpio_n_33"))
# self.submodules += phy
# rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512))
# no SMA GPIO, replaced with PMOD1_0
phy = ttl_serdes_7series.InOut_8X(platform.request("pmod1_33", 0))
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512))
# could check the LED #
phy = ttl_simple.Output(platform.request("user_led_33", 2))
@ -548,9 +560,10 @@ class _NIST_QC2_RTIO:
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512))
# phy = ttl_serdes_7series.InOut_8X(platform.request("user_sma_gpio_n_33"))
# self.submodules += phy
# rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512))
# no SMA GPIO, replaced with PMOD1_0
phy = ttl_serdes_7series.InOut_8X(platform.request("pmod1_33", 0))
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512))
phy = ttl_simple.Output(platform.request("user_led_33", 2))
self.submodules += phy