Commit Graph

133 Commits

Author SHA1 Message Date
705dc4ff1c artiq: lump return value into attributes writeback RPC 2024-11-12 12:02:35 +08:00
45cd01556b [meta] Apply cargo fmt 2024-10-18 14:16:42 +08:00
b6cd2a6993 [meta] Reorganize order of use declarations - Phase 3 2024-10-17 16:25:52 +08:00
c7697606e1 [core] Add TopLevelDef::Variable 2024-10-04 13:09:25 +08:00
fe06b2806f [meta] Reorganize order of use declarations
Use declarations are now grouped into 4 groups:

- Declarations from the standard library
- Declarations from external crates
- Declarations from other crates in this project
- Declarations from within this module

Furthermore, all use declarations are grouped together to enhance
readability. super::super is also replaced by an equivalent crate::
declaration.
2024-10-04 12:52:01 +08:00
f2c047ba57 artiq: support async rpcs
Co-authored-by: mwojcik <mw@m-labs.hk>
Co-committed-by: mwojcik <mw@m-labs.hk>
2024-09-13 12:12:13 +08:00
f3dc02d646 [meta] Apply cargo fmt 2024-09-09 14:24:52 +08:00
6098b1b853 fix previous commit 2024-09-06 11:32:08 +08:00
668ccb1c95 nac3core: expose inkwell and nac3parser 2024-09-06 11:06:26 +08:00
c8dfdcfdea
standalone & artiq: remove class_names from resolver 2024-08-27 23:43:40 +08:00
9848795dcc core/irrt: add exceptions and debug utils 2024-08-27 22:55:22 +08:00
6beff7a268 [artiq] Implement core_log and rtio_log in terms of polymorphic_print
Implementation mostly references the original implementation in Python.
2024-08-13 15:19:03 +08:00
6ca7aecd4a [artiq] Add core_log and rtio_log function declarations 2024-08-13 15:19:03 +08:00
8fd7216243 [core] toplevel/composer: Add lateinit_builtins
This is required for the new core_log and rtio_log functions, which take
a generic type as its parameter. However, in ARTIQ builtins are
initialized using one unifier and then actually used by another unifier.

lateinit_builtins workaround this issue by deferring the initialization
of functions requiring type variables until the actual unifier is ready.
2024-08-13 15:19:03 +08:00
cbf79c5e9c core/typecheck/typedef: Add is_vararg to FuncArg, ConcreteFuncArg 2024-08-06 11:43:13 +08:00
0ba68f6657 core: Set target triple and datalayout for each module
Fixes an issue with inconsistent pointer sizes causing crashes.
2024-07-26 13:35:40 +08:00
5faeede0e5 Determine size_t using LLVM target machine 2024-07-26 13:35:38 +08:00
8d9df0a615 artiq: Fix ndarray class ID
We want the class ID of the ndarray class, not its corresponding typing
class.
2024-06-19 18:56:15 +08:00
1bc95a7ba6 Add handling for np.bool_ and np.str_ 2024-06-19 15:10:47 +08:00
ce3e9bf4fe nac3artiq: add support string attributes in classes 2024-06-17 16:53:51 +08:00
23974feae7 meta: Restrict number of allowed lints 2024-06-12 16:10:57 +08:00
40a3bded36 meta: Set clippy lints in {main,lib}.rs
So that this does not have to be manually passed to the `cargo clippy`
command-line every single time. Also allows incrementally addressing
these lints by removing and fixing them one-by-one.
2024-06-12 16:10:57 +08:00
8168692cc3 apply cargo fmt 2024-06-12 14:45:03 +08:00
77de24ef74 core: Use BTreeMap for type variable mapping
There have been multiple instances where I had the need to iterate over
type variables, only to discover that the traversal order is arbitrary.

This commit fixes that by adding SortedMapping, which utilizes BTreeMap
internally to guarantee a traversal order. All instances of VarMap are
now refactored to use this to ensure that type variables are iterated in
 the order of its variable ID, which should be monotonically incremented
 by the unifier.
2024-03-04 23:56:04 +08:00
49de81ef1e core: Apply clippy suggestions 2024-02-23 15:41:06 +08:00
8492503af2 core: Update cargo dependencies 2024-02-23 15:41:04 +08:00
2a922c7480 artiq: Fix source module of NDArray
Should be `numpy.typing` instead of `numpy`.
2024-01-17 10:40:08 +08:00
c395472094 core: Initial infrastructure for ndarray 2023-12-21 15:39:46 +08:00
bd792904f9 core: Add size_t to primitive store
Used for ndims in ndarray.
2023-12-21 15:20:31 +08:00
a19f1065e3 meta: Refactor to use more let-else bindings 2023-12-12 16:31:14 +08:00
32746c37be core: Refactor to return errors by HashSet 2023-12-12 15:41:59 +08:00
beee3e1f7e artiq: Pass artiq builtins to NAC3 constructor 2023-12-12 11:28:03 +08:00
95d0c3c93c artiq: Rename const_generic_dummy to const_generic_marker 2023-12-12 11:23:51 +08:00
bd3d67f3d6 artiq: Apply clippy pedantic changes 2023-12-11 15:16:23 +08:00
02933753ca core: Apply clippy pedantic changes 2023-12-11 15:16:23 +08:00
d304afd333 meta: Apply clippy suggested changes 2023-12-11 15:16:23 +08:00
ef04696b02 meta: Lift return out of conditional statement 2023-12-11 15:16:23 +08:00
5182453bd9 meta: Remove redundant path prefixes 2023-12-11 15:16:23 +08:00
983f080ea7 artiq: Implement handling for const generic variables 2023-12-08 18:02:14 +08:00
7fc2a30c14 Force single-threaded compilation if LLVM is not thread-safe 2023-10-16 15:55:10 +08:00
2a38d5160e meta: Respect opt flags when performing whole-module optimization 2023-09-28 19:58:54 +08:00
ab2360d7a0 core: Remove emit_llvm from CodeGenLLVMOptions
We instead output an LLVM bitcode file when the option is specified on
the command-line.
2023-09-22 17:16:29 +08:00
411837cacd artiq: Specify target CPU when creating LLVM target options
We can try to optimize for the host and Cortex-A9 chips; The RISC-V
ISAs do not target specific chips, so we will fallback to using the
generic CPU.
2023-09-18 11:35:20 +08:00
048fcb0a69 core: Switch to LLVM New Pass Manager 2023-09-18 11:35:15 +08:00
676d07657a core: Add target field to CodeGenLLVMOptions
For specifying the target machine options when optimizing and linking.

This field is currently unused but will be required in a future
commit.
2023-09-18 09:46:24 +08:00
2482a1ef9b core: Add CodeGenTargetMachineOptions
Needed in a future commit.
2023-09-18 09:41:49 +08:00
3993a5cf3f core: Add LLVM options to WorkerRegistry 2023-09-12 10:57:05 +08:00
d37287a33d Cargo: Update dependencies 2023-09-04 10:43:57 +08:00
8f95b79257 nac3artiq: throw error message when constructor use rpc decorator (#306)
Co-authored-by: z78078 <cc@m-labs.hk>
Co-committed-by: z78078 <cc@m-labs.hk>
2022-07-11 15:55:55 +08:00
ebd25af38b nac3standalone: allow classes without explicit init (#221)
Reviewed-on: M-Labs/nac3#304
Co-authored-by: z78078 <cc@m-labs.hk>
Co-committed-by: z78078 <cc@m-labs.hk>
2022-07-07 10:36:25 +08:00