1
0
Fork 0
zynq-rs/libboard_zynq/src
Astro 07fedddad9 libboard_zynq: doc ddr size limitation, correct target_redpitaya to 512MB 2020-11-11 13:25:55 +01:00
..
clocks libboard_zynq: fix pll_cp/pll_res swap in ClockSource::setup() 2020-11-08 22:46:43 +01:00
ddr libboard_zynq: doc ddr size limitation, correct target_redpitaya to 512MB 2020-11-11 13:25:55 +01:00
devc timer::global: wrap us in Microseconds, impl embedded_hal blocking delay traits 2020-07-22 23:41:15 +02:00
eth libboard_zynq/eth/phy: add PEF7071 2020-09-29 16:01:54 +08:00
i2c libboard_zynq: make RegisterBlock constructors more consistent 2020-08-13 14:49:26 +08:00
ps7_init libboard_zynq: complete ddr without ps7_init for cora_z7_10 2020-11-10 14:33:31 +01:00
sdio add Red Pitaya support (WIP) 2020-09-09 20:10:05 +08:00
timer libboard_zynq: make RegisterBlock constructors more consistent 2020-08-13 14:49:26 +08:00
uart add Red Pitaya support (WIP) 2020-09-09 20:10:05 +08:00
axi_gp.rs split into lib{register, cortex_a9, board_zynq, board_zc706} crates 2019-12-17 23:35:58 +01:00
axi_hp.rs split into lib{register, cortex_a9, board_zynq, board_zc706} crates 2019-12-17 23:35:58 +01:00
gic.rs libboard_zynq: make constructor names more consistent 2020-08-13 13:31:53 +08:00
lib.rs remove flash support 2020-09-09 20:13:13 +08:00
logger.rs timer::global: wrap us in Microseconds, impl embedded_hal blocking delay traits 2020-07-22 23:41:15 +02:00
mpcore.rs more cpu options 2020-09-07 16:13:51 +08:00
slcr.rs libboard_zynq/slcr: fixed boot mode pins value 2020-08-31 12:35:11 +08:00
stdio.rs add Red Pitaya support (WIP) 2020-09-09 20:10:05 +08:00
time.rs timer::global: wrap us in Microseconds, impl embedded_hal blocking delay traits 2020-07-22 23:41:15 +02:00