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artiq
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c94c411fd5
artiq
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artiq
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gateware
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Sebastien Bourdeauducq
90e678a442
gateware/nist_qc2: increase DDS bus drive strength.
Closes
#421
2016-05-03 16:29:38 +08:00
..
amp
Implement core device storage (
fixes
#219
).
2016-01-10 13:04:55 +00:00
rtio
analyzer: make byte_count 64-bit
2016-03-19 19:40:23 +08:00
targets
targets/kc705: fix default -H option
2016-04-30 00:30:24 +08:00
__init__.py
artiqlib -> artiq.gateware
2015-03-08 11:00:24 +01:00
ad9xxx.py
gateware,runtime: use new migen/misoc
2015-11-04 00:35:03 +08:00
nist_clock.py
gateware/nist_{clock,qc2}: do not conflict with KC705 I2C
2016-03-03 15:10:50 +08:00
nist_qc1.py
gateware,runtime: use new migen/misoc
2015-11-04 00:35:03 +08:00
nist_qc2.py
gateware/nist_qc2: increase DDS bus drive strength.
Closes
#421
2016-05-03 16:29:38 +08:00
soc.py
soc: use add_extra_software_packages, factor builder code
2016-03-07 00:18:47 +08:00
spi.py
gateware.spi: delay only writes to data register, update doc
2016-03-01 14:14:38 +01:00