forked from M-Labs/artiq
analyzer: make byte_count 64-bit
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4d22db1aff
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900b0cc629
@ -165,7 +165,7 @@ class DMAWriter(Module, AutoCSR):
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alignment_bits=data_alignment)
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self.last_address = CSRStorage(aw + data_alignment,
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alignment_bits=data_alignment)
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self.byte_count = CSRStatus(32) # only read when shut down
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self.byte_count = CSRStatus(64) # only read when shut down
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self.sink = stream.Endpoint(
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[("data", dw),
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@ -199,7 +199,7 @@ class DMAWriter(Module, AutoCSR):
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)
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]
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message_count = Signal(32 - log2_int(message_len//8))
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message_count = Signal(64 - log2_int(message_len//8))
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self.comb += self.byte_count.status.eq(
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message_count << log2_int(message_len//8))
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self.sync += [
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