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Author SHA1 Message Date
David Nadlinger d87042597a master/worker_impl: Factor out "completed" message sending [nfc]
Just reduces the visual complexity/potential for typos a bit, and
we already have put_exception_report().
2020-06-18 01:30:46 +01:00
charlesbaynham 2429a266f6
ad9912: Fix typing problem on ad9912 (#1466)
Closes #1463

FTW and phase word were ambiguously typed, resulting in failure to compile
2020-06-16 20:17:22 +02:00
charlesbaynham ce7e92a75e
docs: Add docs for RTIO SED sequencing (#1461)
Signed-off-by: Charles Baynham <charles.baynham@npl.co.uk>
2020-06-15 18:43:34 +02:00
Harry Ho 1a17d0c869 zotino: add USER LED test 2020-06-11 16:03:56 +08:00
Harry Ho 6156bd4088 fastino: add tests using DACs and USER LEDs 2020-06-11 14:55:46 +08:00
Sebastien Bourdeauducq a18d2468e9 test: do not build libartiq_support in lit.cfg 2020-06-10 17:15:24 +08:00
Robert Jördens 9822b88d9b
ad9910: fix asf range (#1450)
* ad9910: fix asf range

The ASF is a 14-bit word. The highest possible value is 0x3fff, not
0x3ffe. `int(round(1.0 * 0x3fff)) == 0x3fff`.

I don't remember and understand why this was 0x3ffe since the beginning.
0x3fff was already used as a default in `set_mu()`

Signed-off-by: Robert Jördens <rj@quartiq.de>

* RELEASE_NOTES: ad9910 asf scale change

Co-authored-by: David Nadlinger <code@klickverbot.at>
2020-05-29 11:13:26 +02:00
Sebastien Bourdeauducq cb76f9da89 metlino: fix CSR collisions
Closes #1425
2020-05-29 15:59:44 +08:00
Sebastien Bourdeauducq bd9eec15c0 metlino: increase number of DRTIO links
Seems OK with Vivado 2019.2.
2020-05-29 15:59:16 +08:00
Sebastien Bourdeauducq d5c1eaa16e runtime: remove stack alignment requirement
I suppose this was for TMPU, but was never finished.
2020-05-29 15:37:23 +08:00
Sebastien Bourdeauducq 02900d79d0 firmware: fix typos 2020-05-29 15:21:07 +08:00
Sebastien Bourdeauducq d8b5bcf019 sayma_amc: support uTCA backplane for DRTIO 2020-05-29 14:58:49 +08:00
Sebastien Bourdeauducq 8b939b7cb3 sayma_amc: remove Master (obsoleted by Metlino) 2020-05-29 14:40:49 +08:00
Charles Baynham 5db2afc7a7 dashboard: Release notes for #1453 2020-05-26 18:16:35 +08:00
Charles Baynham 692c466838 Use logger formatting 2020-05-26 17:59:55 +08:00
Charles Baynham 8858ba8095 dashboard: Restart applets if required
Restart applets that are already running if a ccb call updates their spec

Signed-off-by: Charles Baynham <charles.baynham@npl.co.uk>
2020-05-26 17:59:55 +08:00
Marius Weber 2538840756
Coredevice Input Validation (#1447)
* Input validation and masking of SI -> mu conversions (close #1446)

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* Update RELEASE_NOTES

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-05-17 15:09:11 +02:00
Marius Weber b3b6cb8efe
ad53xx improvements (#1445)
* ad53xx: voltage_to_mu() validation & documentation (closes #1443, #1444)
The voltage input (float) is checked for validity. If we need more
speed, we may want to check the DAC-code for over/underflow instead.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* ad53xx documentation: voltage_to_mu is only valid for 16-bit DACs

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* AD53xx: add voltage_to_mu method (closes #1341)

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* ad53xx: improve voltage_to_mu performance
Interger comparison is faster than floating point math.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* AD53xx: voltage_to_mu method now uses attribute values

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* Fixup RELEASE_NOTES.rst

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* ad53xx: documentation improvements

voltage_to_mu return value
14-bit DAC support

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2020-05-08 19:23:43 +02:00
Sebastien Bourdeauducq 4e9a529e5a kasli: integrate WRPLL 2020-05-07 21:34:02 +08:00
Sebastien Bourdeauducq 60e5f1c18e kasli: DRTIO support for Kasli 2 2020-05-07 20:09:43 +08:00
Sebastien Bourdeauducq 1f2182d4c7 kasli: default to hardware v2 2020-05-07 19:15:03 +08:00
Sebastien Bourdeauducq 35f1814235 kasli: implement virtual LEDs 2020-05-07 19:07:43 +08:00
Sebastien Bourdeauducq b83afedf43 kasli: light up ERROR LED on panic 2020-05-07 19:06:10 +08:00
Sebastien Bourdeauducq 4982fde898 firmware: I2C I/O expander support 2020-05-05 21:38:17 +08:00
Sebastien Bourdeauducq ef4e5bc69b firmware: Kasli I2C EEPROM cleanup 2020-05-05 21:29:29 +08:00
Sebastien Bourdeauducq 85e92ae28c compiler: use more LLVM tools on ARM (#733) 2020-04-28 16:21:50 +08:00
Sebastien Bourdeauducq 7e400a78f4 kasli: compile tester for hw 2.0 by default 2020-04-28 16:07:56 +08:00
Sebastien Bourdeauducq 140a26ad7e compiler: ld -> ld.lld 2020-04-28 16:07:26 +08:00
Sebastien Bourdeauducq 4228e0205c compiler: link with lld on ARM (#733) 2020-04-28 15:00:24 +08:00
Sebastien Bourdeauducq 3a7819704a rtio: support direct 64-bit now CSR in KernelInitiator 2020-04-26 16:04:32 +08:00
Sebastien Bourdeauducq 251a0101a6 compiler: support disabling now-pinning 2020-04-26 12:38:43 +08:00
Sebastien Bourdeauducq d19f28fa84 kasli: v2 clocking WIP, remove SFP LEDs from RTIO 2020-04-23 23:02:18 +08:00
Sebastien Bourdeauducq 9bc43b2dbf kasli: support EEPROM on v2 2020-04-23 23:00:36 +08:00
Sebastien Bourdeauducq 77e6fdb7a7 artiq_flash: cleanup Sayma RTM management, support flashing AMC with RTM disconnected 2020-04-14 18:22:06 +08:00
Robert Jördens ea79ba4622 ttl_serdes: detect edges on short pulses
Edges on pulses shorter than the RTIO period were missed because the
reference sample and the last sample of the serdes word are the same.

This change enables detection of edges on pulses as short as the
serdes UI (and shorter as long as the pulse still hits a serdes sample
aperture).

In any RTIO period, only the leading event corresponding to the first
edge with slope according to sensitivity is registerd. If the channel is
sensitive to both rising and falling edges and if the pulse is contained
within an RTIO period, or if it is sensitive only to one edge slope and
there are multiple pulses in an RTIO period, only the leading event is
seen. Thus this possibility of lost events is still there. Only the
conditions under which loss occurs are reduced.

In testing with the kasli-ptb6 variant, this also improves resource
usage (a couple hundred LUT) and timing (0.1 ns WNS).
2020-04-13 13:21:03 +02:00
Sebastien Bourdeauducq e8b73876ab comm_kernel: add Zynq runtime identifier 2020-04-12 17:25:14 +08:00
Sebastien Bourdeauducq de57039e6e comm_kernel: cleanup 2020-04-12 16:02:36 +08:00
Sebastien Bourdeauducq 9dc24f255e comm_kernel: remove dead code 2020-04-12 15:06:46 +08:00
Sebastien Bourdeauducq fb0ade77a9 firmware: fix non-DRTIO build 2020-04-10 17:23:17 +08:00
Sebastien Bourdeauducq ec7b2bea12 sayma: round FTW like Urukul in JDCGSyncDDS 2020-04-08 15:00:33 +08:00
Sebastien Bourdeauducq 0f4be22274 sayma: add simple sychronized DDS for testing 2020-04-08 14:13:54 +08:00
Sebastien Bourdeauducq 3c823a483a sayma: improve DAC sync messaging (again) 2020-04-06 22:36:43 +08:00
Sebastien Bourdeauducq 4d601c2102 sayma: improve DAC sync messaging 2020-04-06 22:36:03 +08:00
Sebastien Bourdeauducq 61d4614b61 sayma: fix/cleanup DRTIO-DAC sync interaction 2020-04-06 22:34:05 +08:00
Sebastien Bourdeauducq facc0357d8 drtio: make sure receive buffer is drained after ping reply 2020-04-06 22:33:15 +08:00
Sebastien Bourdeauducq ffd3172e02 sayma: move SYSREF DDMTD to RTM (#795) 2020-04-06 00:01:28 +08:00
Sebastien Bourdeauducq 8f608fa2fa examples/sines_urukul_sayma: adapt for sayma v2, use 1 DAC only 2020-04-05 16:51:40 +08:00
Etienne Wodey 90d08988b2 language/environment: BooleanValue: fix type detection
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-04-04 15:37:04 +08:00
Etienne Wodey 9b03a365ed language/environment: cast argument processor default values early
Fixes #1434. Also add unit tests for some argument processors.

Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-04-04 15:37:04 +08:00
Sebastien Bourdeauducq 371d923385 manual: nixpkgs 20.03 2020-04-04 13:05:46 +08:00