Yann Sionneau
4ac79fb100
conda: update libssh2 libgit2 pygit2 to use anaconda libs instead of system ones
2015-08-14 16:57:33 +02:00
74b9601644
Merge branch 'master' of github.com:m-labs/artiq
2015-08-14 22:46:33 +08:00
Yann Sionneau
966d0ee3f2
pxi6733: fix verification of the number of buffered sample values
2015-08-14 10:36:03 +02:00
13439c62e8
Merge branch 'master' of github.com:m-labs/artiq
2015-08-14 10:56:48 +08:00
12b3157009
doc: add precision about Git commit management
2015-08-14 10:37:45 +08:00
Yann Sionneau
1ce8bbe3ae
conda: add recipe for libssh2 package
2015-08-13 18:51:10 +02:00
f2911d67b7
Enable TCP keepalive on the core device
...
Automatically runs the idle experiment a few seconds after the master stops responding.
Thanks Florent for figuring out TCP_KEEPIDLE_DEFAULT needed to be set in addition to the other options.
Closes #31
2015-08-13 18:33:46 +08:00
a1c7efd0ae
doc: use m-labs anaconda account
2015-08-13 14:47:05 +08:00
f073dfaee5
ttl: add input/output doc
2015-08-13 12:20:12 +08:00
998db5121b
pc_rpc: id_parameters -> description
2015-08-11 23:29:52 +08:00
a6ab066c87
ctlmgr: support immediate controller retry
2015-08-11 23:22:36 +08:00
Yann Sionneau
80805407bf
conda: add Windows support for pygit2 and libgit2 packages
2015-08-11 16:44:22 +02:00
Yann Sionneau
075bf331ac
travis: use more recent libstdc++
2015-08-11 14:05:41 +02:00
Yann Sionneau
b70b2252d5
conda: add pygit2+libgit2 recipes + pygit2 dependency in artiq pkg
2015-08-11 12:55:53 +02:00
whitequark
fd3c8a2830
language.core: remove {int,round}64, implement int with device semantics.
2015-08-11 12:57:17 +03:00
whitequark
786fde827a
Unbreak tests.
2015-08-11 00:41:31 +03:00
Yann Sionneau
80e8928c70
conda: llvmlite-artiq has been rebuilt with an updated version
2015-08-10 20:34:06 +02:00
whitequark
200330a808
Remove parts of py2llvm that are implemented in the new compiler.
2015-08-10 20:36:39 +03:00
whitequark
62e6f8a03d
compiler.embedding.Stitcher: refactor.
2015-08-10 20:26:07 +03:00
whitequark
46476516ba
ARTIQException: tell linecache where to look for runtime sources.
...
Runtime sources can appear in the backtrace when
artiq_raise_from_c is used.
2015-08-10 20:26:07 +03:00
whitequark
c72267ecf5
Implement syscalls for the new compiler.
2015-08-10 20:26:06 +03:00
whitequark
435559fe50
Allow type annotations on remotely called functions.
2015-08-10 17:48:35 +03:00
whitequark
b28a874274
Inferencer: range() does not accept a float argument.
2015-08-10 17:06:55 +03:00
06badd1dc1
scheduler: refactor, fix pipeline hazards
2015-08-10 21:58:11 +08:00
whitequark
f53a5ff202
Remove syscall builtin.
2015-08-10 16:44:29 +03:00
47e3d0337d
Merge branch 'master' of github.com:m-labs/artiq
2015-08-10 21:14:09 +08:00
whitequark
261515dfe5
compiler.targets.OR1KTarget: fix typo.
2015-08-10 15:47:44 +03:00
whitequark
75532d10aa
Display full core device backtraces.
2015-08-10 15:12:22 +03:00
whitequark
c63ec70c53
LLVMIRGenerator: emit debug information.
2015-08-10 15:11:52 +03:00
b700f591f1
protocols/pc_rpc: add missing import
2015-08-10 20:07:39 +08:00
52de6311a4
test/scheduler: add repo_msg
2015-08-10 20:07:24 +08:00
Yann Sionneau
c57ce6d750
conda: llvmdev should be built in Release mode with assertions enabled
2015-08-10 12:25:05 +02:00
whitequark
4f02f6e667
compiler.types: make all hashable.
2015-08-10 13:15:42 +03:00
whitequark
8f510a4407
compiler.ir.Function: add loc field.
2015-08-10 13:14:52 +03:00
Yann Sionneau
393576fc01
conda: add missing build.sh for llvmdev-or1k pkg
2015-08-10 12:13:07 +02:00
af230f6cf3
Merge branch 'master' of github.com:m-labs/artiq
2015-08-10 15:18:50 +08:00
d9d74661c1
doc: scheduling
2015-08-10 15:17:02 +08:00
9772676f2d
doc: cleanup shell prompts
2015-08-10 15:16:52 +08:00
whitequark
22570afbda
LLVMIRGenerator: allocate less.
2015-08-10 09:12:34 +03:00
whitequark
95b56e85a3
Add binutils patch.
2015-08-09 23:33:00 +03:00
whitequark
b99eae6b3f
session.c: send_rpc_value: fix list serialization.
2015-08-09 20:36:14 +03:00
whitequark
dfc91a35f2
ARTIQIRGenerator.polymorphic_print: str([x]) uses repr(x), not str(x).
2015-08-09 20:27:04 +03:00
whitequark
f7b64db8f4
LLVMIRGenerator: fixup phis on expansion of ARTIQ instructions.
2015-08-09 20:24:16 +03:00
whitequark
d4270cf66e
Implement receiving data from RPCs.
2015-08-09 20:17:00 +03:00
whitequark
02b1543c63
Implement receiving exceptions from RPCs.
2015-08-09 16:16:41 +03:00
whitequark
8b7d38d203
Add ARTIQ_DUMP_ASSEMBLY.
2015-08-09 15:47:29 +03:00
54b11a392a
ctlmgr: graceful controller termination
2015-08-09 20:41:11 +08:00
4b195663f6
pc_rpc/Server: add built-in terminate
2015-08-09 20:40:15 +08:00
whitequark
9c5ca2ae29
LLVMIRGenerator: add target data layout to LLVM modules.
2015-08-09 14:39:21 +03:00
a21049d779
ctlmgr: exponential backoff
2015-08-09 18:28:56 +08:00
