93a853a0e0
test/sawg: non trivial coarse_ref_period
2016-12-01 16:00:06 +01:00
01057dfb6d
test/sawg: check 48 bit frequency
2016-11-30 11:21:25 +01:00
ea04fb2704
test/sawg: skip 2tone demo test
2016-11-30 11:02:41 +01:00
ed6d1e73cc
sawg: cleanup
2016-11-30 10:52:35 +01:00
fb58f31c9d
Revert "sawg: test w/o discrete_compensate"
...
This reverts commit b736dd0df7
2016-11-29 20:56:04 +01:00
dbf72f5fde
sawg: extend unittests
2016-11-29 20:52:51 +01:00
b736dd0df7
sawg: test w/o discrete_compensate
2016-11-29 20:52:02 +01:00
d8b5eac856
sawg: style
2016-11-29 20:51:40 +01:00
4f813c4977
test/sawg: rtio_output_wide fixes
2016-11-29 18:11:38 +01:00
d9dd79fb1a
sawg: int32 artiq python
2016-11-29 17:36:03 +01:00
4a03e3fce0
sawg: rtio_output_wide
2016-11-29 17:23:06 +01:00
f6fc7f9216
rtio: rtio_output_{list->wide}
2016-11-29 17:22:55 +01:00
313aa32779
sawg: artiq-python list scoping
2016-11-29 17:20:02 +01:00
c53040e1e4
sawg: work around #632
2016-11-29 17:01:39 +01:00
a3d9e21b8c
sawg: artiq-python changes
2016-11-29 16:58:26 +01:00
82c651c17a
phaser: remove trivial sawg demo
2016-11-29 15:40:23 +01:00
27160f5912
phaser: make sysref input only for timing
2016-11-29 15:28:10 +01:00
7816078d6b
phaser/demo: update
2016-11-29 15:11:18 +01:00
7657cf1264
phaser: bump misoc/migen
2016-11-29 14:55:15 +01:00
d5d17aca9e
Merge remote-tracking branch 'm-labs/master' into phaser2
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* m-labs/master:
applets: compatibility with older Qt. Closes #629
doc: update LLVM configure command (fixes #628 ).
runtime: match argument signedness between ARTIQ Python and ksupport.
runtime: refactor rtio_output_list.
runtime: use correct ABI when accepting ARTIQ lists.
2016-11-29 14:49:30 +01:00
23fd225947
sawg: spline knot packing/conversion, unittest
2016-11-29 14:49:07 +01:00
c5b55c1dfe
applets: compatibility with older Qt. Closes #629
2016-11-29 10:45:07 +08:00
whitequark
2ec6d43441
doc: update LLVM configure command ( fixes #628 ).
2016-11-26 07:26:06 +00:00
whitequark
ea25856d92
runtime: match argument signedness between ARTIQ Python and ksupport.
...
This is only required when reading the ABI very strictly, but better
be conservative here than spend time debugging silly stuff.
2016-11-26 07:25:22 +00:00
whitequark
cf12a888e7
runtime: refactor rtio_output_list.
2016-11-26 07:25:22 +00:00
whitequark
79e70fa465
runtime: use correct ABI when accepting ARTIQ lists.
2016-11-26 07:25:22 +00:00
41779367b5
phaser: adapt conda recipe
2016-11-24 16:04:13 +01:00
55e37b41ec
phaser: use ttl_simple.Input for sync
2016-11-24 15:55:26 +01:00
6fa2a6ebd8
phaser: move ad9154 spi/jesd api to rust
2016-11-24 15:53:14 +01:00
8060652913
phaser: use Inout_8X
2016-11-24 15:21:03 +01:00
617650f3b2
phaser: extract target
2016-11-24 15:20:51 +01:00
1c84d1ee59
Merge branch 'master' into phaser2
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* master:
rtio: support differential ttl
RELEASE_NOTES: int(a, width=b) removal, use int32/64
pc_rpc: use ProactorEventLoop on Windows (#627 )
2016-11-24 15:05:49 +01:00
95c885b580
rtio: support differential ttl
2016-11-24 15:04:12 +01:00
d0a55e5c9b
RELEASE_NOTES: int(a, width=b) removal, use int32/64
2016-11-24 14:32:51 +01:00
7d4297b9bb
pc_rpc: use ProactorEventLoop on Windows ( #627 )
2016-11-24 10:19:13 +08:00
54235e5743
Merge branch 'master' into phaser2
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* master:
runtime: support rtio data wider than 64 bit
moninj.rs: force u32 dds_ftws
2016-11-23 21:09:21 +01:00
dab19d23cc
runtime: support rtio data wider than 64 bit
2016-11-23 16:40:52 +01:00
fbf60108a8
moninj.rs: force u32 dds_ftws
2016-11-23 16:39:08 +01:00
e7d588f612
Merge branch 'master' into phaser2
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* master:
runtime.rs/rtio.rs: style
runtime.rs: wide rtio data
rtio: auto clear output event data and address
2016-11-23 15:09:09 +01:00
a964cf24f2
runtime.rs/rtio.rs: style
2016-11-23 15:03:36 +01:00
8cce5d2fcd
runtime.rs: wide rtio data
2016-11-23 15:03:36 +01:00
347609d765
rtio: auto clear output event data and address
...
This is to support channels where variable length
event data is well-defined through zero-padding.
E.g. in the case of `Spline` zero-padding of events naturally
corresponds to low-order knots.
Use timestamp change as trigger. This assumes that writes to the
timestamp register always precede address and data writes.
It does not break support for ganged writes of the same event
timestamp and data/address to multiple channels or
channel-addresses.
2016-11-23 15:03:36 +01:00
32fdacd95a
Merge remote-tracking branch 'm-labs/master' into phaser2
...
* m-labs/master:
runtime: don't attempt to perform writeback if disabled in kernel.
runtime: print trace level log messages to UART during startup.
runtime: support for targets without RTIO log channel
runtime: support for targets without I2C
kc705: remove stale DDS definition
runtime: show a prompt to erase startup/idle kernels.
2016-11-23 14:56:29 +01:00
fec34d605e
runtime.rs/rtio.rs: style
2016-11-23 14:56:20 +01:00
whitequark
4df7941a97
runtime: don't attempt to perform writeback if disabled in kernel.
...
Otherwise, the startup kernel session hangs.
2016-11-23 13:53:40 +00:00
whitequark
cd7527b701
runtime: print trace level log messages to UART during startup.
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There's no way to retrieve them otherwise if the startup kernel
hangs.
2016-11-23 13:53:40 +00:00
0443f83d5e
runtime: support for targets without RTIO log channel
2016-11-23 10:50:55 +08:00
cd40d5b107
runtime: support for targets without I2C
2016-11-23 10:50:55 +08:00
fbd83cf9ee
kc705: remove stale DDS definition
2016-11-22 22:48:22 +08:00
whitequark
965fdd35e5
runtime: show a prompt to erase startup/idle kernels.
2016-11-22 14:45:40 +00:00
