forked from M-Labs/artiq
1
0
Fork 0

mailbox: parametrize address width

This commit is contained in:
occheung 2021-11-08 12:30:09 +08:00 committed by Sébastien Bourdeauducq
parent c6e0e26440
commit dd68b4ab82
1 changed files with 3 additions and 3 deletions

View File

@ -3,9 +3,9 @@ from misoc.interconnect import wishbone
class Mailbox(Module): class Mailbox(Module):
def __init__(self, size=1): def __init__(self, size=1, adr_width=30):
self.i1 = wishbone.Interface() self.i1 = wishbone.Interface(data_width=32, adr_width=adr_width)
self.i2 = wishbone.Interface() self.i2 = wishbone.Interface(data_width=32, adr_width=adr_width)
# # # # # #