From dd68b4ab82a9ec1c5badd5db9913d0fecd1e067b Mon Sep 17 00:00:00 2001
From: occheung <dc@m-labs.hk>
Date: Mon, 8 Nov 2021 12:30:09 +0800
Subject: [PATCH] mailbox: parametrize address width

---
 artiq/gateware/amp/mailbox.py | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/artiq/gateware/amp/mailbox.py b/artiq/gateware/amp/mailbox.py
index 7c60056d1..6c498b821 100644
--- a/artiq/gateware/amp/mailbox.py
+++ b/artiq/gateware/amp/mailbox.py
@@ -3,9 +3,9 @@ from misoc.interconnect import wishbone
 
 
 class Mailbox(Module):
-    def __init__(self, size=1):
-        self.i1 = wishbone.Interface()
-        self.i2 = wishbone.Interface()
+    def __init__(self, size=1, adr_width=30):
+        self.i1 = wishbone.Interface(data_width=32, adr_width=adr_width)
+        self.i2 = wishbone.Interface(data_width=32, adr_width=adr_width)
 
         # # #