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metlino: fix CSR collisions 

Closes #1425
This commit is contained in:
Sebastien Bourdeauducq 2020-05-29 15:59:44 +08:00
parent bd9eec15c0
commit cb76f9da89
1 changed files with 1 additions and 0 deletions
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artiq/gateware/targets/metlino.py
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@ -46,6 +46,7 @@ class Master(MiniSoC, AMPSoC):
integrated_sram_size=8192, integrated_sram_size=8192,
ethmac_nrxslots=4, ethmac_nrxslots=4,
ethmac_ntxslots=4, ethmac_ntxslots=4,
csr_address_width=15,
**kwargs) **kwargs)
AMPSoC.__init__(self) AMPSoC.__init__(self)
add_identifier(self) add_identifier(self)