3 Commits (961e2e1dd0d8bb34fa6f49784f6608b0f2d3f149)

Author	SHA1	Message	Date
Astro	961e2e1dd0	zynq::{ddr, eth}: fix clock divisor calculation ... off-by-one, didn't change behavior.	2019-11-03 02:23:16 +01:00
Astro	6bee1f44f4	zynq: replace unnecessary slcr::unlocked with new	2019-10-31 20:48:07 +01:00
Astro	c046bbf8a2	move slcr, clocks, uart, eth into src/zynq/	2019-10-21 22:19:03 +02:00