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03122f810a
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openocd: adapt to newer version (zc706)
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2021-06-25 17:43:05 +08:00 |
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c7e9f85de2
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openocd: adapt to newer version
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2021-06-25 17:01:02 +08:00 |
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104d1ef232
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openocd: name kasli_soc consistently
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2021-06-25 16:45:38 +08:00 |
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42cdedae91
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openocd: fix Kasli-SoC nSRST
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2021-05-29 12:17:59 +08:00 |
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823ec374ba
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kasli-soc: internal JTAG
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2021-05-28 18:44:07 +08:00 |
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666c077cef
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openocd: add Kasli-SoC (with digilent external JTAG)
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2021-05-28 18:22:17 +08:00 |
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aef010cb14
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openocd: remove xilinx-tcl on Cora Z7
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2020-11-08 18:44:41 +01:00 |
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a6955edf14
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add Red Pitaya support (WIP)
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2020-09-09 20:10:05 +08:00 |
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a51f8f2eea
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openocd: remove ps7_init on Cora Z7
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2020-09-09 15:00:09 +08:00 |
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7680de26f0
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openocd: sync with artiq-zynq 8bb1727e64
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2020-09-09 14:58:18 +08:00 |
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7695d6d8df
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openocd: fix cora z7-10 PL_TAPID
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2020-05-16 01:34:09 +02:00 |
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Stewart Mackenzie
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43722eff8b
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add support for cora z7 in tmux script
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2020-01-24 07:51:29 +08:00 |
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Stewart Mackenzie
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957228f134
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document bitstream loading in readme and remove from zc706.cfg
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2020-01-16 02:14:16 +08:00 |
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Stewart Mackenzie
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738ee32a51
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improved the development process
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2020-01-15 05:22:35 +08:00 |
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Stewart Mackenzie
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2e8d291ee7
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running code causes board to fail in an unrecoverable manner
change to using the olimex-arm-usb-tiny and adjust openocd
srst settings so the failure is now recoverable
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2020-01-03 18:07:07 +08:00 |
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6e50b32e80
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openocd: configure SRST for digilent_jtag_smt2_nc + Zynq
Digilent docs say Zynq boards should connect it to GPIO2.
Closes #2
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2019-11-05 12:36:07 +08:00 |
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43501003f9
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openocd/zc706: decimate adapter_khz for reliability
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2019-10-31 00:28:19 +01:00 |
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06bc7ba809
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openocd: fix PL_TAPID for both targets
Fixes Gitea issue #1
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2019-09-28 23:53:40 +02:00 |
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e135b27c13
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openocd: fix PL_TAPID for both zc706 and cora-z7-10
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2019-08-10 20:59:07 +02:00 |
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5a8d714627
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working openocd scripts for zc706 and cora-z7-10
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2019-06-29 02:41:36 +02:00 |
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