cortex_a9::mmu: make OCM region cachable

2019-12-17 00:56:18 +01:00 · 2019-12-17 00:56:18 +01:00 · a8cb085a25
parent 1ba587ccf9
commit a8cb085a25
1 changed files with 1 additions and 1 deletions
--- a/src/cortex_a9/mmu.rs
+++ b/src/cortex_a9/mmu.rs
@ -124,7 +124,7 @@ impl L1Table {
            tex: 0b101,
            domain: 0b1111,
            exec: true,
-            cacheable: false,
+            cacheable: true,
            bufferable: true,
        });
        /* (DDR cacheable) */