forked from M-Labs/zynq-rs
eth phy: set LEDs only on Kasli-SoC
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2b3c7e4b2f
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072fd5f015
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@ -310,6 +310,7 @@ impl<GEM: Gem> Eth<GEM, (), ()> {
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let phy = Phy::find(&mut inner).expect("phy");
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phy.reset(&mut inner);
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phy.restart_autoneg(&mut inner);
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#[cfg(feature="target_kasli_soc")]
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phy.set_leds(&mut inner);
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Eth {
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@ -85,6 +85,8 @@ const OUI_MARVELL: u32 = 0x005043;
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const OUI_REALTEK: u32 = 0x000732;
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const OUI_LANTIQ : u32 = 0x355969;
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//only change pages on Kasli-SoC's Marvel 88E11xx
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#[cfg(feature="target_kasli_soc")]
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const PAGE_REGISTER: u8 = 0x16;
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impl Phy {
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@ -126,7 +128,9 @@ impl Phy {
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PA: PhyAccess,
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PR: PhyRegister + From<u16>,
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{
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#[cfg(feature="target_kasli_soc")]
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pa.write_phy(self.addr, PAGE_REGISTER, PR::page().into());
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pa.read_phy(self.addr, PR::addr()).into()
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}
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@ -136,7 +140,9 @@ impl Phy {
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PR: PhyRegister + From<u16> + Into<u16>,
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F: FnMut(PR) -> PR,
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{
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#[cfg(feature="target_kasli_soc")]
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pa.write_phy(self.addr, PAGE_REGISTER, PR::page().into());
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let reg = pa.read_phy(self.addr, PR::addr()).into();
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let reg = f(reg);
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pa.write_phy(self.addr, PR::addr(), reg.into())
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@ -192,6 +198,7 @@ impl Phy {
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);
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}
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#[cfg(feature="target_kasli_soc")]
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pub fn set_leds<PA: PhyAccess>(&self, pa: &mut PA) {
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self.modify_leds(pa, |leds|
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leds.set_led0(Led0Control::OnCopperLinkOffElse)
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