From 072fd5f0150ef8e6949f63c792d7d91691ebfa97 Mon Sep 17 00:00:00 2001 From: mwojcik Date: Thu, 10 Mar 2022 16:07:25 +0800 Subject: [PATCH] eth phy: set LEDs only on Kasli-SoC --- libboard_zynq/src/eth/mod.rs | 1 + libboard_zynq/src/eth/phy/mod.rs | 7 +++++++ 2 files changed, 8 insertions(+) diff --git a/libboard_zynq/src/eth/mod.rs b/libboard_zynq/src/eth/mod.rs index 877b774..fa877f5 100644 --- a/libboard_zynq/src/eth/mod.rs +++ b/libboard_zynq/src/eth/mod.rs @@ -310,6 +310,7 @@ impl Eth { let phy = Phy::find(&mut inner).expect("phy"); phy.reset(&mut inner); phy.restart_autoneg(&mut inner); + #[cfg(feature="target_kasli_soc")] phy.set_leds(&mut inner); Eth { diff --git a/libboard_zynq/src/eth/phy/mod.rs b/libboard_zynq/src/eth/phy/mod.rs index b7209be..950e56e 100644 --- a/libboard_zynq/src/eth/phy/mod.rs +++ b/libboard_zynq/src/eth/phy/mod.rs @@ -85,6 +85,8 @@ const OUI_MARVELL: u32 = 0x005043; const OUI_REALTEK: u32 = 0x000732; const OUI_LANTIQ : u32 = 0x355969; +//only change pages on Kasli-SoC's Marvel 88E11xx +#[cfg(feature="target_kasli_soc")] const PAGE_REGISTER: u8 = 0x16; impl Phy { @@ -126,7 +128,9 @@ impl Phy { PA: PhyAccess, PR: PhyRegister + From, { + #[cfg(feature="target_kasli_soc")] pa.write_phy(self.addr, PAGE_REGISTER, PR::page().into()); + pa.read_phy(self.addr, PR::addr()).into() } @@ -136,7 +140,9 @@ impl Phy { PR: PhyRegister + From + Into, F: FnMut(PR) -> PR, { + #[cfg(feature="target_kasli_soc")] pa.write_phy(self.addr, PAGE_REGISTER, PR::page().into()); + let reg = pa.read_phy(self.addr, PR::addr()).into(); let reg = f(reg); pa.write_phy(self.addr, PR::addr(), reg.into()) @@ -192,6 +198,7 @@ impl Phy { ); } + #[cfg(feature="target_kasli_soc")] pub fn set_leds(&self, pa: &mut PA) { self.modify_leds(pa, |leds| leds.set_led0(Led0Control::OnCopperLinkOffElse)