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Author SHA1 Message Date
occheung 2838213457 fix language 2022-06-17 16:12:27 +08:00
occheung 2d0a866274 2238: add spec on max voltage with term 
Updates #35.
Same termination structure as bnc/sma-ttl card.
Technically the max allowable voltage with termination is a bit higher than 5V.
But it seems that it will still exceed the termination resistor rating limit at 5.5V.
The only method of acquiring V_ds & other parameters is by eye-balling the I-V curve of the MOSFET, which is not precise.
So the calculation assumes V_ds=0, just to be conservative.
 2022-06-17 16:07:21 +08:00
occheung 2964e13102 2118-2128: separate term rating to another spec 2022-06-17 16:06:26 +08:00
3 changed files with 6 additions and 5 deletions
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6
2118-2128.tex
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@ -357,8 +357,7 @@ The typical value of minimum pulse width is based on test results\footnote{\labe
\textbf{Parameter} & \textbf{Symbol} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
\hline
High-level input voltage\repeatfootnote{transceiver} & $V_{IH}$ & 2 & & 5.5 & V & termination disabled \\
& & 2 & & 5 & V & termination enabled \\
High-level input voltage\repeatfootnote{transceiver} & $V_{IH}$ & 2 & & 5.5* & V & \\
\hline
Low-level input voltage\repeatfootnote{transceiver} & $V_{IL}$ & -0.5 & & 0.8 & V & \\
\hline
@ -368,6 +367,7 @@ The typical value of minimum pulse width is based on test results\footnote{\labe
\hline
Low-level output current\repeatfootnote{transceiver} & $I_{OL}$ & & & 376 & mA & \\
\thickhline
\multicolumn{7}{l}{*With the 50\textOmega~termination enabled, the input voltage should not exceed 5V.}
\end{tabularx}
\end{threeparttable}
\end{table}
@ -562,7 +562,7 @@ The channel should be configured as output in both the gateware and hardware.
\subsection{Sub-coarse-RTIO-cycle pulse}
With the use of the ARTIQ RTIO, only 1 event can be enqueued per coarse RTIO cycle, which is typically 8ns.
Therefore, to emit a pulse that is less than 8ns, additional delay is needed such that the \texttt{ttl.on()} \& \texttt{ttl.off()} event are submitted at different coarse RTIO cycles.
The TTL pulse parameter must satisfy the minimum pulse width stated in the electircal specifications.
The TTL pulse must satisfy the minimum pulse width stated in the electircal specifications.
\inputcolorboxminted{firstline=88,lastline=92}{examples/ttl.py}

3
2238.tex
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@ -488,7 +488,7 @@ Both recommended operating conditions and electrical characteristics are based o
\textbf{Parameter} & \textbf{Symbol} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
\hline
Input voltage & $V_{I}$ & 0 & & 5.5 & V \\
Input voltage & $V_{I}$ & 0 & & 5.5* & V \\
\hline
High-level output current & $I_{OH}$ & & & -24 & mA \\
\hline
@ -496,6 +496,7 @@ Both recommended operating conditions and electrical characteristics are based o
\hline
Input edge rate & $\frac{\Delta t}{\Delta V}$ & 0 & & 10 & ns/V & $0.8V \leq V_I \leq 2.0V$ \\
\thickhline
\multicolumn{7}{l}{*With the 50\textOmega~termination enabled, the input voltage should not exceed 5V.}
\end{tabularx}
\end{threeparttable}
\end{table}

2
5518-5528.tex
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@ -52,7 +52,7 @@
\section{General Description}
The 5518 BNC-IDC card is a 8hp EEM module, while the 5528 SMA-IDC card is a 4hp EEM module.
Both adapter cards breaks out analog signal from IDC connectors to BNC (5518) or SMA (5528).
Both adapter cards break out analog signal from IDC connectors to BNC (5518) or SMA (5528).
IDC connectors can be found on 5108 Sampler, 5432 DAC Zotino, 5632 DAC Fastino \& 5568 HD68-IDC.
Each card provides 8 channels, with BNC (5518) or SMA (5528) connectors.