 occheung
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df9078b897
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2118-2128: add BoM manually
Updates #30.
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2022-01-21 13:01:23 +08:00 |
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occheung
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9f6056f615
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ttl: remove extra rtio break in example
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2022-01-20 14:58:40 +08:00 |
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occheung
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9488a03aa4
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ttl: factor out examples
Also, the ttl timestamp_mu method has a parameter.
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2022-01-20 14:51:51 +08:00 |
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occheung
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611a0009af
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bump version
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2022-01-19 15:34:54 +08:00 |
|
occheung
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56082b94c3
|
2118-2128: add footnote for data source
Updates #29.
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2022-01-17 14:44:13 +08:00 |
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occheung
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4ef628b708
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dio: rename transceivers on the IO side
Naming all transceivers on the IO side as "IO Bus Transceiver(s)".
Just to differentiate it from LVDS transceivers.
Closes #21.
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2022-01-14 14:41:14 +08:00 |
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occheung
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3654502d1b
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dio: add spec sources
Also remove propagation delay specs from LVDS-TTL.
PCB traces would make a significant impact.
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2022-01-14 14:09:32 +08:00 |
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occheung
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7230cdbec1
|
2118-2128: clarify connector type
Just to clarify, no self converting mechanical magic here.
Closes #27.
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2022-01-14 13:05:21 +08:00 |
 Sebastien Bourdeauducq
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cd7d118f7c
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update disclaimers
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2022-01-14 11:55:48 +08:00 |
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occheung
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6b24b54f60
|
ttl: add switch desc section
Closes #20.
Closes #22.
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2022-01-11 16:56:38 +08:00 |
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occheung
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282b7bf244
|
move drawings in front of ARTIQ examples
And some additional reformatting.
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2022-01-07 17:25:34 +08:00 |
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occheung
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39b10ecbd2
|
slightly enlarge FP drawings
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2022-01-07 10:37:16 +08:00 |
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occheung
|
ffa71dc40c
|
FP dimen -> FP drawings
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2022-01-06 17:32:36 +08:00 |
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occheung
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02e9cce585
|
2118-2128: add front panel figures
Missing BNC-TTL FP drawings.
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2022-01-06 11:46:30 +08:00 |
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occheung
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a32c43c0b8
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2128 -> 2118/2128
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2021-12-23 12:56:11 +08:00 |