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Syrostan
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KiCad Schematic 100%
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mikelam 7060490ce2 v1.1 release 2022-02-12 16:29:23 +08:00
FabricationOutput v1.1 release 2022-02-12 16:29:23 +08:00
TestAutomation.pretty see update log for details 2021-08-31 17:36:44 +08:00
.gitignore all: update gitignore; remove redundant files 2021-06-22 09:44:50 +08:00
CurrentSenser.sch PCB: replace ice40 package with default library BGA256 2021-07-23 17:04:50 +08:00
Ethernet.sch see update log for details 2021-08-31 17:36:44 +08:00
FPGA.sch use 2x17 connector for FPGA_IO and 2x12 connector for Analog; use FPGA GBIN pins for FSMC and HSADC clocks 2022-02-07 23:28:10 +08:00
HighSpeedADC.sch PCB: replace ice40 package with default library BGA256 2021-07-23 17:04:50 +08:00
LVDS_IO.sch use 2x17 connector for FPGA_IO and 2x12 connector for Analog; use FPGA GBIN pins for FSMC and HSADC clocks 2022-02-07 23:28:10 +08:00
MCU.sch use 2x17 connector for FPGA_IO and 2x12 connector for Analog; use FPGA GBIN pins for FSMC and HSADC clocks 2022-02-07 23:28:10 +08:00
Power.sch see update log for details 2021-08-31 17:36:44 +08:00
Syrostan.pdf see update log for details 2021-08-31 17:36:44 +08:00
TestAutomation.bck all: update gitigore to fix symbol and footpin bugs; replace messy libs into one 2021-06-21 16:05:17 +08:00
TestAutomation.dcm all: update gitigore to fix symbol and footpin bugs; replace messy libs into one 2021-06-21 16:05:17 +08:00
TestAutomation.kicad_pcb v1.1 release 2022-02-12 16:29:23 +08:00
TestAutomation.lib see update log for details 2021-08-31 17:36:44 +08:00
TestAutomation.net PCB: finish LVDS routing 2021-06-24 15:43:31 +08:00
TestAutomation.pro v1.1 release 2022-02-12 16:29:23 +08:00
TestAutomation.sch PCB: replace ice40 package with default library BGA256 2021-07-23 17:04:50 +08:00
fp-lib-table all: update gitigore to fix symbol and footpin bugs; replace messy libs into one 2021-06-21 16:05:17 +08:00
sym-lib-table PCB: fix logo resolution issue, fix AG5300 module pin bug, update crystal package, add SMT positioning hole; FabricationOutput: add SMT position and BOM file 2021-07-14 14:33:32 +08:00
update_log.txt use 2x17 connector for FPGA_IO and 2x12 connector for Analog; use FPGA GBIN pins for FSMC and HSADC clocks 2022-02-07 23:28:10 +08:00