18 lines
625 B
Plaintext
18 lines
625 B
Plaintext
v1.0
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-first production version
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v1.1
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-replace ice40 package with default library BGA256
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-optimize buck converter capacitors position
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-fix PoE schematic bug
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-optimize silk position overlapping
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-optimize ENC624J600 decoupling capacitors
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-optimize 12V decoupling capacitors
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-optimize screw keepout hole
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-add external oscillator for FPGA
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-fix CPU_IO headers interferes with Analog headers
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-fix MCU ADC7 and ADC6 label bug
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-change TPS2590 resistor to change current limit (TODO)
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-1.27mm headers use standard pin numbers (2x12, 2x15, 2x17)
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-Connect HSADC clock and FSMC clock to GB pins for better clock performance
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