v1.0
 -first production version

v1.1
 -replace ice40 package with default library BGA256
 -optimize buck converter capacitors position
 -fix PoE schematic bug
 -optimize silk position overlapping
 -optimize ENC624J600 decoupling capacitors
 -optimize 12V decoupling capacitors
 -optimize screw keepout hole
 -add external oscillator for FPGA
 -fix CPU_IO headers interferes with Analog headers
 -fix MCU ADC7 and ADC6 label bug
 -change TPS2590 resistor to change current limit (TODO)
 -1.27mm headers use standard pin numbers (2x12, 2x15, 2x17)
 -Connect HSADC clock and FSMC clock to GB pins for better clock performance 
