Syrostan-MCU-C/FPGA
2022-02-04 16:33:41 +08:00
..
lvds EEM output working 2022-01-22 17:50:49 +08:00
fsmc.pcf.bak use software FSMC to avoid FPGA strange inout issue 2022-01-09 20:30:28 +08:00
fsmc.v.bak use software FSMC to avoid FPGA strange inout issue 2022-01-09 20:30:28 +08:00
makefile HSADC working (under 25MHz clock); FSMC working; make file can generate fpga bitstram as C array 2021-12-26 16:53:27 +08:00
pinmap.pcf add eem0 and eem2 port support; eem0 input working 2022-02-04 16:33:41 +08:00
top.v add eem0 and eem2 port support; eem0 input working 2022-02-04 16:33:41 +08:00