10 Commits

Author	SHA1	Message	Date
mikelam	34042d1c59	add eem0 and eem2 port support; eem0 input working	2022-02-04 16:33:41 +08:00
mikelam	cf76348432	EEM output working	2022-01-22 17:50:49 +08:00
mikelam	d64ae0e652	add time stamp (in ns) for plotting; ADC working at 80MHz	2022-01-15 20:52:15 +08:00
mikelam	a082a2bd0d	use UART to transmit data out and plot wave using python for HSADC performance testing (working well @75MHz)	2022-01-15 19:38:30 +08:00
mikelam	5d1c7c4d51	FPGA BRAM working	2022-01-15 15:54:47 +08:00
mikelam	900c0e292f	add PLL to generate 50MHz clock for ADC	2022-01-09 21:28:03 +08:00
mikelam	fe0d520b28	use software FSMC to avoid FPGA strange inout issue	2022-01-09 20:30:28 +08:00
mikelam	32098c89ae	multiplexer working	2021-12-31 10:57:11 +08:00
mikelam	259ec7e7ec	HSADC working (under 25MHz clock); FSMC working; make file can generate fpga bitstram as C array	2021-12-26 16:53:27 +08:00
Zheng-Jiakun	a01bf0c0c9	change to STM32F103VFT6; add ADC and SW/LED IO labels; simple testing for 5V GND MOS switch	2021-08-31 17:38:28 +08:00