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zynq-rs
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554 Commits (master)

Author SHA1 Message Date
Sebastien Bourdeauducq 80d12d5780 libconfig: make default IP/MAC depend on board 2020-10-14 12:53:32 +08:00
Sebastien Bourdeauducq 4dd8c93729 add SZL for Red Pitaya 2020-10-14 12:35:23 +08:00
Sebastien Bourdeauducq 6266d28095 expose patched cargo-xbuild 2020-10-13 18:43:37 +08:00
Sebastien Bourdeauducq 1796d4e236 update some dependencies 
Older versions do not compile with newer Rust.
 2020-10-13 18:28:42 +08:00
Sebastien Bourdeauducq 56c94b0855 patch cargo-xbuild to ensure copied Cargo.lock is writable 
https://github.com/rust-osdev/cargo-xbuild/issues/96
 2020-10-13 18:27:52 +08:00
Sebastien Bourdeauducq 34a63d7732 use new location for libraries in Rust source 2020-10-13 18:27:01 +08:00
Sebastien Bourdeauducq 27d310a937 update Rust 
Needed for compatibility with recent cargo-xbuild.
 2020-10-13 18:25:39 +08:00
pca006132 f60d0589cc fix ps7_init compilation error and warnings 2020-10-01 00:17:47 +08:00
Sebastien Bourdeauducq 7c9edfdbd5 README: add introduction 2020-09-29 16:27:44 +08:00
pca006132 c336e450b1 libboard_zynq/eth/phy: add PEF7071 2020-09-29 16:01:54 +08:00
pca006132 6af453494b libboard_zynq/ddr: use ps7_init for redpitaya ddr 2020-09-26 17:01:37 +08:00
Sebastien Bourdeauducq ac3e6983b0 experiments: fix zc706 build 2020-09-09 21:30:56 +08:00
Sebastien Bourdeauducq 338f918531 experiments: update banner 2020-09-09 21:29:25 +08:00
Sebastien Bourdeauducq 4751fd6011 default.nix: build redpitaya-experiments 2020-09-09 21:28:32 +08:00
Sebastien Bourdeauducq e601ac9c45 remove flash support 
PITA to get to work and most boards have SD.
 2020-09-09 20:13:13 +08:00
Sebastien Bourdeauducq a6955edf14 add Red Pitaya support (WIP) 2020-09-09 20:10:05 +08:00
Sebastien Bourdeauducq c634313d5e update authors in cargo.toml 2020-09-09 19:36:25 +08:00
Sebastien Bourdeauducq 7360984efb add libconfig, libcoreio, szl from artiq-zynq a277e89b3ad; update dependencies 2020-09-09 17:56:50 +08:00
Sebastien Bourdeauducq 82794d3abd default.nix: make naming consistent with artiq-zynq 2020-09-09 17:12:08 +08:00
Sebastien Bourdeauducq 450ccef18e sync nix files with artiq-zynq c3f9a76f2a; add fsbl 2020-09-09 16:51:50 +08:00
Sebastien Bourdeauducq 4e18368aaf remove obsolete build.sh 2020-09-09 15:03:17 +08:00
Sebastien Bourdeauducq 75494421c5 cargo: remove unmaintained runner 2020-09-09 15:01:39 +08:00
Sebastien Bourdeauducq c4fb7b4c41 cargo: remove unmaintained dev profile 2020-09-09 15:01:03 +08:00
Sebastien Bourdeauducq a51f8f2eea openocd: remove ps7_init on Cora Z7 2020-09-09 15:00:09 +08:00
Sebastien Bourdeauducq 7680de26f0 openocd: sync with artiq-zynq 8bb1727e64 2020-09-09 14:58:18 +08:00
Sebastien Bourdeauducq 7edd192c3b remove outdated/unmaintained files 2020-09-09 14:57:03 +08:00
pca006132 4fef8a7192 libasync/executor: reduced reallocation for vector 2020-09-07 16:13:51 +08:00
pca006132 ae244082ed more cpu options 2020-09-07 16:13:51 +08:00
Sebastien Bourdeauducq 66c66447dd fix some compilation warnings 2020-09-06 00:17:59 +08:00
pca006132 02c67051e8 CPU options for better performance 
L2 cache options and prefetch options
 2020-09-04 16:38:48 +08:00
pca006132 08fd1391c5 libcortex_a9/mmu: enabled program flow prediction 2020-09-04 13:18:39 +08:00
pca006132 a116142f63 libsupport_zynq/ram: check ptr range for deallocation 2020-09-03 12:56:10 +08:00
pca006132 157439bc88 libcortex_a9/semaphore: mark new as const fn 2020-09-02 09:51:52 +08:00
pca006132 a73df780d0 libboard_zynq/slcr: fixed boot mode pins value 
Notice that the bits in the table in UG585 are out of order.
 2020-08-31 12:35:11 +08:00
pca006132 e73ec731aa libboard_zynq/smoltcp: default without ipv6 support 
SZL netboot binary size too large with ipv6.
We can enable the ipv6 support in the runtime crate instead.
 2020-08-31 12:07:20 +08:00
pca006132 73e4e4fd03 libcortex_a9/sync_channel: fixed memory leak 
ptr::drop_in_place would not drop the box content properly,
the best way is to convert it back to a box and implicitly drop it.
 2020-08-27 17:03:26 +08:00
Sebastien Bourdeauducq 273f9ea72b libboard_zynq/eth: fix comment 2020-08-24 21:47:10 +08:00
pca006132 671968bac3 libboard_zynq/eth: fixed tx lost packet 2020-08-24 15:51:01 +08:00
pca006132 39f672dde8 libasync/smoltcp/mod: prevent duplicated wakers 2020-08-24 15:25:03 +08:00
pca006132 c13ca614ef libcortex_a9/mutex: use AcqRel for CAS operations 2020-08-24 15:24:20 +08:00
pca006132 bb09d25378 libboard_zynq/ethernet: ethernet fix and config 2020-08-21 13:34:02 +08:00
pca006132 a1f859637a experiments: enabled L2 cache 
...and removed some trailing spaces
 2020-08-20 13:02:28 +08:00
pca006132 7cb2669c3b Updated cargo dependencies 2020-08-20 13:01:49 +08:00
pca006132 511c906d4d libcortex_a9/uncached: fixed mmu setting 2020-08-20 13:01:49 +08:00
pca006132 1ba0aa450f libsupport_zynq/boot: fix cache mainteinance opertaions 2020-08-20 13:01:49 +08:00
pca006132 283bc9b810 libcortex_a9: added L2 cache 2020-08-20 13:01:17 +08:00
Astro b268fe015a stdio::drop_uart(): add delay 2020-08-17 19:38:41 +02:00
Astro 64db9b0142 Merge pull request 'libboard_zynq: dead code, peripheral & regblock ctor names consistency' (#63) from harry/zynq-rs:cleanup into master 2020-08-17 23:38:22 +08:00
Astro 4b258c19f5 libasync: improve scheduling fairness between block_on and spawned tasks 
in the libasync::smoltcp::Sockets::run() case the block_on iface.poll
loop would progress just one task before. now all tasks get to run in
each iteration.
 2020-08-17 00:58:12 +02:00
Harry Ho 1a96a7550a libboard_zynq: make RegisterBlock constructors more consistent 2020-08-13 14:49:26 +08:00