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zynq-rs
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pca006132 2020-09-07 16:12:56 +08:00
parent 66c66447dd
commit ae244082ed
2 changed files with 3 additions and 3 deletions
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2
libboard_zynq/src/mpcore.rs
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@ -154,7 +154,7 @@ register_bit!(scu_control, enable, 0);
impl ScuControl { impl ScuControl {
pub fn start(&mut self) { pub fn start(&mut self) {
self.modify(|_, w| w.enable(true)); self.modify(|_, w| w.enable(true).scu_speculative_linefill_enable(true));
} }
} }

4
libcortex_a9/src/mmu.rs
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@ -158,7 +158,7 @@ impl L1Table {
global: true, global: true,
shareable: true, shareable: true,
access: AccessPermissions::FullAccess, access: AccessPermissions::FullAccess,
tex: 0b101, tex: 0b0,
domain: 0b1111, domain: 0b1111,
exec: true, exec: true,
cacheable: true, cacheable: true,
@ -213,7 +213,7 @@ impl L1Table {
access: AccessPermissions::FullAccess, access: AccessPermissions::FullAccess,
tex: 0, tex: 0,
domain: 0, domain: 0,
exec: true, exec: false,
cacheable: false, cacheable: false,
bufferable: true, bufferable: true,
}); });