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artiq-zynq
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274 Commits 12 Branches 0 Tags 2.2 MiB
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14 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq f69e41af5e gateware: fix VADJ I/O standard conflict 2020-07-16 17:58:31 +08:00
Sebastien Bourdeauducq 6a361893c2 gateware: make LEDs common to all variants 
Makes quick testing easier.
 2020-07-16 17:36:27 +08:00
Sebastien Bourdeauducq ae7ca22db9 dma: fix endianness issues 2020-07-16 17:27:08 +08:00
Sebastien Bourdeauducq 10a12245a3 analyzer: fix endianness issue 2020-07-16 17:10:09 +08:00
Sebastien Bourdeauducq 0c6db0d12c analyzer: use 32-bit byte_count 2020-07-16 11:36:04 +08:00
Sebastien Bourdeauducq 0b0ca8de49 analyzer: drive wid and wstrb 2020-07-15 23:11:19 +08:00
Sebastien Bourdeauducq 8e758ecc17 add RTIO analyzer core (untested) 2020-07-15 23:06:34 +08:00
Sebastien Bourdeauducq b68cb137e5 dma: style 2020-07-15 23:06:14 +08:00
Sebastien Bourdeauducq 12ba867268 dma: fix and cleanup test 2020-07-13 18:58:08 +08:00
Sebastien Bourdeauducq 5c3c3c26b5 dma: fix inflight_cnt and eop generation 2020-07-13 18:51:55 +08:00
Sebastien Bourdeauducq ea96cf96d3 dma: add simulation test (WIP) 2020-07-13 12:04:10 +08:00
Sebastien Bourdeauducq 10888cc6c6 dma: remove unneeded import 2020-07-13 10:42:02 +08:00
Sebastien Bourdeauducq a7073edf79 add DMA core (untested) 2020-07-13 10:37:17 +08:00
Sebastien Bourdeauducq e3ff21b1b5 create gateware folder 2020-07-11 17:49:54 +08:00