occheung
  • Joined on 2020-05-03
occheung commented on pull request M-Labs/thermostat#70 2022-09-06 11:58:46 +08:00
GUI

This error kept popping up on the console after running python pytec/tecQT.py.

Traceback (most recent call last):
  File "/home/occheung/Desktop/thermostat/pytec/tecQT.py", line 233, in…
occheung closed issue sinara-hw/datasheets#48 2022-09-05 12:00:44 +08:00
2238 MCX-TTL Input edge rate
occheung closed issue sinara-hw/datasheets#52 2022-09-05 12:00:31 +08:00
5108 ADC Sampler Noise spec units
occheung pushed to master at sinara-hw/datasheets 2022-09-05 11:59:52 +08:00
f3858552b6 2245: remove absolute maximum specs
occheung closed issue sinara-hw/datasheets#50 2022-09-05 11:59:52 +08:00
Absolute Maximum Ratings
occheung pushed to master at sinara-hw/datasheets 2022-08-11 10:49:00 +08:00
ebc1235847 1124: add insn for clock configuation setup
occheung commented on issue sinara-hw/datasheets#49 2022-08-10 17:40:36 +08:00
2118 BNC-TTL / 2128 SMA-TTL Isolation spec

There are some example spec from the MAX14434 datasheet. image But the isolator is after the I/O transcievers, we really shouldn't be seeing…

occheung commented on issue sinara-hw/datasheets#50 2022-08-10 16:34:39 +08:00
Absolute Maximum Ratings

2245 LVDS-TTL seems to be the only card that has the absolute maximum rating section. It doesn't tell anything really special about the card either, especially when other operational specs in the…

occheung closed issue sinara-hw/datasheets#44 2022-08-10 15:27:31 +08:00
Clocker "rise time" spec is likely incorrect
occheung closed issue sinara-hw/datasheets#36 2022-08-10 15:27:22 +08:00
2118/2128: specify maximum input and output toggle rate
occheung closed issue sinara-hw/datasheets#38 2022-08-10 15:26:40 +08:00
document 1-EEM vs. 2-EEM mode in Urukul
occheung closed issue sinara-hw/datasheets#46 2022-08-10 15:26:22 +08:00
Sampler input with termination enabled shall never exceed 5V regardless of gain setting
occheung closed issue sinara-hw/datasheets#43 2022-08-10 15:26:04 +08:00
Clocker has no "differential" signals
occheung closed issue sinara-hw/datasheets#10 2022-08-10 15:07:42 +08:00
write Kasli datasheet
occheung commented on issue sinara-hw/datasheets#10 2022-08-10 15:07:36 +08:00
write Kasli datasheet

4b9822c

I had omitted the sysclk path (including the oscillator) in the block diagram. It seems that we are working towards merging the RTIO and sys clock. There are not much to discuss about…

occheung pushed to master at sinara-hw/datasheets 2022-08-09 17:31:32 +08:00
4b9822c07e 1124: init
occheung commented on issue M-Labs/artiq-zynq#196 2022-08-05 14:27:13 +08:00
Problems with DMA on Kasli-Soc

I've been having a play with a Kasli-SoC, and I'm having some trouble with DMA. It seems that whenever I try and playback a DMA recording containing 128 events or more it hangs. I guess this is…

occheung commented on issue sinara-hw/datasheets#26 2022-07-28 12:21:01 +08:00
add details about RTIO PHY

3a6ed63 added minimum time separation for registering 2 adjacent gated edges. The default size of input event FIFO is also addressed. The number of timestamps that can be acquired before trigger…

occheung pushed to master at sinara-hw/datasheets 2022-07-27 15:24:26 +08:00
d387006656 2118-2128: (max. -> min.) sustained event separation
69696899ac 2118-2128: tabulate MSES
8ce5cca85e 2118-2128: update code line range
d6d29c89a1 ttl_in/MTD: fix time.sleep duration
a7dfa03a21 ttl_in/MTD: import time
Compare 5 commits »
occheung pushed to master at sinara-hw/datasheets 2022-07-26 18:26:59 +08:00
440b3ef3df 2118-2128: add t_min info from #26