Support CoreMgmt over DRTIO on Zynq Devices
It might be possible if you start multiple aqctl_corelog
with different binding ports specified by -p
.
Though in practice, all I see is the older aqctl_corelog
not emitting anything, even…
47fc53c4bf
drtio_tuple -> drtio_context
42eaecf9e1
remove debug message
beb7e6f994
cargo fmt
4502a47aa6
drtio_proto: add allocate step for flashing
ac6b7d5cf0
satman: fix checksum error message
runtime: handle drtio-eem satellite disconnection
92c768e88f
runtime: handle drtio-eem satellite disconnection
2c633409b8
Set FCLK0 for EBAZ4205
9774b39fd8
flake: update zynq-rs
9054e4a7cb
flake: update zynq-rs, switch to oxalica rust overlay
d79bf8d54a
gateware: Add default TTLs to EBAZ4205 (#335)
Terminate both binary operator branches with *_end basic blocks
The panic looks like this currently:
; ModuleID = 'main'
source_filename = "main"
target datalayout = "e-m:e-p:32:32-i64:64-n32-S128"
target triple = "riscv32-unknown-linux"
%min_arti…
Terminate both binary operator branches with *_end basic blocks
Pass kernel return alongside attributes writeback
b53266e9e6
artiq: use async RPC for attributes writeback
86eb22bbf3
artiq: main is always the last module
beaa38047d
artiq: suppress main module debug warning
705dc4ff1c
artiq: lump return value into attributes writeback RPC
Treat
not
operator as logical not
c3927d0ef6
[ast] Refactor lazy_static to LazyLock
202a902cd0
[meta] Update dependencies
b6e2644391
[meta] Update cargo dependencies
45cd01556b
[meta] Apply cargo fmt
b6cd2a6993
[meta] Reorganize order of use declarations - Phase 3